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dkasmin
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Registered: ‎10-16-2012

32bits transfer in XSpiPs

How to enable 32 bit width whole word data transfer mode in bare metal Zynq SPI ?

What need to change in XPS & SDK?

In the axi_spi core have param:C_NUM_TRANSFER_BITS= int 32, but in bare metal Zynq SPI i found nothing.

I tried to use the Xilinx search, but found nothing.

Thanks,

Dmit.

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dkasmin
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Registered: ‎10-16-2012

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