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aishwaryab
Visitor
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Registered: ‎02-23-2018

ADV7511 Xilinx Evaluation Boards Reference Design

Hello,

 

I am trying to implement ADV7511 Xilinx Reference Design on zc702. When I build the project in SDK, I am getting the following error:

c:/xilinx/sdk/2017.4/gnu/aarch32/nt/gcc-arm-none-eabi/bin/../lib/gcc/arm-none-eabi/6.2.1/../../../../arm-none-eabi/bin/ld.exe: cannot find -llibHDMI_ZynqLib.a
collect2.exe: error: ld returned 1 exit status
make: *** [sw.elf] Error 1

 

Can someone help me with solving this error?

 

Thanks,

Aishwarya

 

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9 Replies
florentw
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Registered: ‎11-09-2015

Hi @aishwaryab,

 

Where did you find the reference design? Are you using the recommended vivado/SDK version for it?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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aishwaryab
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Registered: ‎02-23-2018

Hi Florent,

 

Thank you for your reply. 

 

I downloaded the reference design from the following link:

https://wiki.analog.com/resources/fpga/xilinx/kc705/adv7511

 

I am using Vivado 2017.4.

 

Do I need to use 2016.4 version only?

 

Aishwarya

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aishwaryab
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Registered: ‎02-23-2018

Hi @florentw,

 

I tried using Vivado/SDK 2016.4 version as well. I am still getting the same error.

 

ERROR:

c:/xilinx/sdk/2016.4/gnu/aarch32/nt/gcc-arm-none-eabi/bin/../lib/gcc/arm-none-eabi/5.2.1/../../../../arm-none-eabi/bin/ld.exe: cannot find -llibHDMI_ZynqLib.a
collect2.exe: error: ld returned 1 exit status
make: *** [sw.elf] Error 1
 

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florentw
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2,185 Views
Registered: ‎11-09-2015

Hi @aishwaryab,

 

It depends on which version you checked out on git. IF hdl_2017_r1, yes you need to use 2016.4.

 

Then did you follow all the steps from the tutorial, specifically this one:

"In the same window, go to Settings→Libraries and add the path of the lib folder and the name of the library used. For a Zynq based platform the name is HDMI_ZynqLib (libHDMI_ZynqLib.a on Github) and for a Microblaze the name is HDMI_MicroblazeLib (libHDMI_MicroblazeLib.a on Github)"

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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aishwaryab
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Registered: ‎02-23-2018

Hi @florentw,

 

I am using hdl-2017_r1 and no-OS-2017_R1 and using 2016.4 version.

 

I followed each and every step of the tutorial. But still no good.

 

Aishwarya

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florentw
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Registered: ‎11-09-2015

Hi @aishwaryab,

 

Could you share a screenshot of the window configuration for Settings→Libraries?

Did you try to re-click on apply?

Could you try another path for the library?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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manoj_kumar0007
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Registered: ‎02-06-2018

Hello Sir, 

           I am using Vivado 2017.4 ..which version of reference designs of ( ADV7511) i should use ? kindly provide the link ..

I am getting following errors when i implemented the design (2017_r1) in ADV7511 reference designs.

 

ERROR: [BD 5-106] Arguments to the connect_bd_intf_net command cannot be empty.
ERROR: [Common 17-39] 'connect_bd_intf_net' failed due to earlier errors.

    while executing
"connect_bd_intf_net $m_name_1 $m_name_2"
    invoked from within
"if {[get_property CLASS $m_name_1] eq "bd_intf_pin"} {
    puts "connect_bd_intf_net $m_name_1 $m_name_2"
    connect_bd_intf_net $m_name_1 $m_name_2
..."
    (procedure "ad_connect" line 40)
    invoked from within
"ad_connect  sys_ps7/DMA0_REQ axi_spdif_tx_core/DMA_REQ"
    (file "/home/xenoverze/Desktop/adv7511/hdl-hdl_2017_r1/projects/common/zc702/zc702_system_bd.tcl" line 178)

    while executing
"source $ad_hdl_dir/projects/common/zc702/zc702_system_bd.tcl"
    (file "system_bd.tcl" line 2)

    while executing
"source system_bd.tcl"
    (procedure "adi_project_xilinx" line 101)
    invoked from within
"adi_project_xilinx adv7511_zc702"
    (file "./system_project.tcl" line 6)

 

Thank you.

 

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aishwaryab
Visitor
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2,055 Views
Registered: ‎02-23-2018

lib_path.PNG

 

Hi @florentw,

 

I have tried different path as well tried re-clicking on apply. 

 

Thanks,

Aishwarya

 

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florentw
Moderator
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1,883 Views
Registered: ‎11-09-2015

Hi @aishwaryab,

 

Did you do it for both Debug and Release configurations?

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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