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Observer chenji.tu
Observer
11,276 Views
Registered: ‎02-04-2016

ATC2 Core Support in Vivado for Ultrascale device [Urgent]

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Hello guys:

 

For extending Agilent / Keysight Logic Analyzer debug ability, an IP Core from Xilinx ISE v14.3 called "

ATC2 (ChipScope Pro - Agilent Trace Core 2)" is needed, for cooperation with Agilent / Keysight's application called "

B4655A FPGA Dynamic Probe" running on the logic analyzer.

 

ATC2 is a Mux logic which takes select signals sent from the logic analyzer. For our next project, we will use Ultrascale FPGA, we need this ATC2 Core IP to probe more signals inside the FPGA. 

 

But it seems that Vivado does not support this IP Core.

 

Is there a work around to get this ATC2 Core running in Vivado?

 

 

 

 

Is there a work around to take the ATC2 Core from ISE and use it 

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Xilinx Employee
Xilinx Employee
21,838 Views
Registered: ‎10-24-2013

Re: ATC2 Core Support in Vivado for Ultrascale device [Urgent]

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Hi @chenji.tu

 

There are no plans of supporting ATC2 core in vivado in the near future.

For 7 series devices, the way is to use ISE for the ATC2 core.

As you are using Ultrascale device, I suggest you to use the debug methods available with Vivado.

 

Thanks,Vijay
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Xilinx Employee
Xilinx Employee
21,839 Views
Registered: ‎10-24-2013

Re: ATC2 Core Support in Vivado for Ultrascale device [Urgent]

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Hi @chenji.tu

 

There are no plans of supporting ATC2 core in vivado in the near future.

For 7 series devices, the way is to use ISE for the ATC2 core.

As you are using Ultrascale device, I suggest you to use the debug methods available with Vivado.

 

Thanks,Vijay
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Observer chenji.tu
Observer
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Registered: ‎02-04-2016

Re: ATC2 Core Support in Vivado for Ultrascale device [Urgent]

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Hello Mr. Vijay:

 

Thank you for helping.

 

Can you please further explain the debug methods available with Vivado?

 

For our current Zynq project, we are still using ISE and PlanAhead. For our next project, we use Ultrascale. Xilinx ILA and ChipScope offer only state-mode sampling. For our high speed application, we need Logic Analyzer for physical debug, and also running in asynchronous sampling mode, which Xilinx ILA doesn't offer. We need ACT2 Core for debugging thousands of internal signals inside FPGA.

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Observer chenji.tu
Observer
11,245 Views
Registered: ‎02-04-2016

Re: ATC2 Core Support in Vivado for Ultrascale device [Urgent]

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Moderator
Moderator
10,634 Views
Registered: ‎07-31-2012

Re: ATC2 Core Support in Vivado for Ultrascale device [Urgent]

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Hi,

 

The debugging methods available in Vivado is using listed debug IP cores in IP catalog as you said.

Please refer to http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_2/ug908-vivado-programming-debugging.pdf for more details.

 

Regards

Praveen

 

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