12-20-2018 05:15 AM
I am using Xilinx Ultrascale eval board, i am running QNX OS on Zynq using QNX BSP available for this specific board.
What i want to achieve here is, i want to access AXI bus for read / write purpose from QNX application. In QNX BSP there is no AXI driver available.
I have tried mmap API from QNX to access AXI address, but this hangs the CPU core.
Is there is any way how i can perform AXI transaction from my application.
01-14-2019 11:33 PM
There are no AXI device drivers, AXI transaction are just physical memory accesses so read/write operations are enough for accessing AXI peripherals. I'm not familiar with QNX but I would say you don't need to mmap it, just accessing the physical address is enough.
Could you provide more details about the use case? I mean, might be you are trying to access to a PL IP with the device not being programmed? Please provide more information about design, tools, code sections...
You should also try to do the same access from a pure standalone test application as well to ensure the design is correct.
01-15-2019 03:04 AM
I am trying to access AXI slave from QNX Application
1. Programmed Zynq with bit file having AXI slave and AXI bus block design. I have attached block diagram for your reference.
2. Created a QNX Application and tried two ways of accessing AXI memory
a. Assigning a pointer to AXI slave memory address and tried read / write on address location (0xA0000000)
b. Used mmap QNX API to map physical address to virtual address and accessed virtual address using pointer. As soon as we read / write on this pointer location, CPU hangs and we need to power cycle the system.
3. I have tried a bare metal program to access AXI slave address using Vivado SDK and its working perfectly fine.
I am using Vivado tool to program bit file in FPGA and using QNX IDE i am running my application on Zynq.
Also there is no reset in between programming bit file and running QNX application.
I am not sure if this is the right way to testing this.
01-16-2019 09:35 AM
Does the point 2.a work fine? I mean accessing to the slave memory address from the QNX without mmap? If so then the issue is clearly on the QNX virtual mapping usage.