05-31-2017 10:02 AM
I have ISE 14.7 and I want to use AXI Interconnect with 1 master and 10 slaves configuration. In AXI Interconnect Vivado wizard I can use N-Slaves (N master interfaces) but I cant in ISE. Any solutions?
05-31-2017 01:29 PM
@carruinar you can always manually instantiate the interconnect and make the connections yourself after setting the number of master & slave ports.
05-31-2017 04:04 PM
@carruinar no, instantiate in a text file which is how one does logic design for real ;-)
axi_interconnect_v1_7_12_top #(.C_NUM_MASTER_SLOTS = 10) u0 (...);
07-18-2018 04:08 AM
I am attempting the same same thing. It appears the only way to configure the AXI Interconnect this way for ISE is to do it in EDK. (Launch XPS and create a small system there).
After adding adding the master and slave connectors and configuring everything generate the simulation files. This seem to be useable as an HDL source that can then be instantiated in the RTL design.
Perhaps there is an easier way but I don't see it. Directly instantiating the core doesn't seem viable after looking at the generated stuff.