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velu.plg
Visitor
Visitor
694 Views
Registered: ‎01-20-2014

AXI Master Design

Hi I need to read 64bit data from the processor. For this process I need Xilinx AXI IP. Kindly suggest which Xilinx IP can I use for this process.

Tool :2016.4

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u4223374
Advisor
Advisor
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Registered: ‎04-26-2015

Which processor? How is it connected? Where does the data need to go?

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velu.plg
Visitor
Visitor
674 Views
Registered: ‎01-20-2014

Processor : MPSoC;

Input data is a Image of 640x400. I need to read the 640bit data from the read memory location using 64bit AXI Master and stored into the FIFO. Once the FIFO gets all the 640bits AXI Write transaction will happen in the different memory location. i.e) we copy the data from one memory location into another location.

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