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AXI-Stream FIFO reads wrong value in Occupancy register

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Participant
Posts: 30
Registered: ‎03-29-2016
Accepted Solution

AXI-Stream FIFO reads wrong value in Occupancy register

I'm using two AXI-Stream FIFOs with one as tx only feeding into another as rx only both with interrupts enabled and concatenated back to the Zynq7020.

I made a program in SDK to transmit data to the TX_FIFO and then using the RX_FIFO's interrupt receive the data back by augmenting the xllfifo_interrupt_example code. According to both the code and p.40 of the core's documentation in the receive handler data is read like the following: 

 

	ReceiveLength = (XLlFifo_iRxGetLen(InstancePtr))/WORD_SIZE;
	while(XLlFifo_iRxOccupancy(InstancePtr)) {
		for (i=0; i < ReceiveLength; i++) {
				RxWord = XLlFifo_RxGetWord(InstancePtr);
				*(DestinationBuffer+i) = RxWord;
		}
	}

However even though ReceiveLength gets the correct value (256 in this example) the XLlFifo_iRxOccupancy function returns 0 causing nothing to be read. When commenting out the while portion of the loop and forcing the read all of the data is recovered properly.

So what's the deal? There is certainly data in the FIFO why is this not returning the correct value?

Full code:

https://pastebin.com/ZiCiAvbD

 

Thanks

Tools Vivado/SDK 2015.4


Accepted Solutions
Participant
Posts: 55
Registered: ‎06-27-2013

Re: AXI-Stream FIFO reads wrong value in Occupancy register

I found this while searching on an issue of my own, and figured I might as well answer it, since I stumbled across a note in the documentation that explains the problem:

 

This is from PG080: "Note: RDFO should be read before reading RLR. Reading RLR first will result in the RDFO being reset to zero."

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Participant
Posts: 30
Registered: ‎03-29-2016

Re: AXI-Stream FIFO reads wrong value in Occupancy register

Is this not the proper place for this question or should I provide more information? PL connection diagram? It's the two axi-stream fifo cores feeding into one another (AXI4-LITE -> AXI_FIFO_TX -AXISTREAM-> AXI_FIFO_RX -> AXI4-LITE); the interrupts being attached to a concatenation block which in turn feeds into the PL2PS Interrupt line on the Zynq7020. AXI connections are the default system generated ones.

Participant
Posts: 55
Registered: ‎06-27-2013

Re: AXI-Stream FIFO reads wrong value in Occupancy register

I found this while searching on an issue of my own, and figured I might as well answer it, since I stumbled across a note in the documentation that explains the problem:

 

This is from PG080: "Note: RDFO should be read before reading RLR. Reading RLR first will result in the RDFO being reset to zero."