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Observer xilin
Observer
10,840 Views
Registered: ‎10-25-2014

Block Memory - Different Utilization with Simple Dual Port (SDP) and True Dual Port (TDP)

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Hello,

I would like to have a True Dual Port (TDP) ram with both ports configured to be 512 x 64 (depth x width).
If I configure the ram to be in Simple Dual Port (SDP) mode only one 36K BRAM is utilized as expected (sdp.png attachment).
However, in TDP mode two 36K BRAMs are utilized (tdp.png attachment).
Since the design is low on Block RAMs I would like to know how to fix this?

Thanks for your time.

sdp.png
tdp.png
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Scholar u4223374
Scholar
21,140 Views
Registered: ‎04-26-2015

Re: Block Memory - Different Utilization with Simple Dual Port (SDP) and True Dual Port (TDP)

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Unfortunately that's a limitation of the 7-series block RAMs. In TDP mode, each 36K RAM can only support 36-bit width, so you need two of them to get the requested 64-bit width. In SDP mode the data width can double to 72-bit, so a single RAM is adequate.

 

There isn't any way to fix it. Either you modify the design to accept a thinner data bus (ie 36-bit), or you figure out a way to use SDP mode.

2 Replies
Observer xilin
Observer
10,835 Views
Registered: ‎10-25-2014

Re: Block Memory - Different Utilization with Simple Dual Port (SDP) and True Dual Port (TDP)

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Edit:
I use Vivado 2015.4 (but this also applies to previous versions) and a Zedboard.

Links to the png attachments in high resolution.
https://forums.xilinx.com/xlnx/attachments/xlnx/EDK/38699/1/sdp.png
https://forums.xilinx.com/xlnx/attachments/xlnx/EDK/38699/2/tdp.png

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Scholar u4223374
Scholar
21,141 Views
Registered: ‎04-26-2015

Re: Block Memory - Different Utilization with Simple Dual Port (SDP) and True Dual Port (TDP)

Jump to solution

Unfortunately that's a limitation of the 7-series block RAMs. In TDP mode, each 36K RAM can only support 36-bit width, so you need two of them to get the requested 64-bit width. In SDP mode the data width can double to 72-bit, so a single RAM is adequate.

 

There isn't any way to fix it. Either you modify the design to accept a thinner data bus (ie 36-bit), or you figure out a way to use SDP mode.