08-01-2012 12:21 PM
I've tried this separately as an ISE project and later starting from PlanAhead. In both cases, generating the netlist fails with the first module (typically proc_sys_reset) in EDK. In Planahead, the following indescript error message is generated:
Does anyone have an idea what this error message means?
08-20-2012 02:10 PM
I have recently run into this error as well. What OS are you running? What is the message in the line above this red highlighted error in the tcl console? Is it related to gmake?
I am attempting to run this in Debian and it was suggested to me that gmake may not exist so i should try linking gmake to make via the command: "ln –s /usr/bin/make /usr/bin/gmake".
Perhaps that will help you better than me.
09-20-2012 06:18 AM
I had this same error message. I scrolled up in the TCL Console and saw that I had a Verilog syntax error.
02-14-2013 10:46 AM
I had the same message:
[Edk 24-166] (generate_target): Failed to execute XPS script. Please check for any errors reported by the XPS application in the console:
In Plan ahead, on the Tcl Console tab at the bottom, i scrolled up and found that i had a type-o in my .vhdl file. Fixed the type-o, and Synthesis completed. Thanks for the solution!
05-22-2013 09:31 AM
I am new to xilinx and all.I am working for a project and got the same error as yours.
Could you please help in elaborating how to find the type-o error and what to do to fix it?
I have found the type-o in console window but i have no idea on how to proceeed.
Note:i am using 14.4 on windows 8.
05-22-2013 10:04 AM
You need to click on the "TCL Console" tab at the bottom of the PlanAhead window. Hit Control+F to bring up the find window, and search for ERROR. Scroll through until you find the description of the error. It will tell you which file it is in, and usually on which line. Open that VHDL file and fix the problem!
05-22-2013 10:32 AM
05-22-2013 04:22 PM - edited 05-22-2013 04:24 PM
No, i think you may have misunderstood. The file that you attached is the actual Tcl script that runs the synthesis on your project. You need to look at the results of the synthesis, in the Tcl Console. It will show you all notes, warnings, and errors generated during the synthesis of your project. You then need to scroll through to find what source file caused the script to exit with an error. Fix that source file.
05-22-2013 11:02 PM
I think i understand now.
I went through all the 'Error' in the Tcl console and found that in in a system.mhs file the error was no license or invalid license problem to v_tc and v_cresample.
When i googled about it it said that normal licenses wouldnt work because these are I.P core licenses.
Can you help me in this regard?
Where can i find the I.P license?
Thanks for your time.