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Visitor vikram_vk
Visitor
25,838 Views
Registered: ‎04-08-2009

Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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I have this design on a zynq 7030 that includes a PS block diagram section and PL RTL. Using Vivado 2014.3

 

When using no OOC blocks, I'm able to generate the bit file, export it to SDK and test the design succesfully.

 

Now the problem....

I decided to set the PS block diagram section as OOC (to speed up synthesis). Everything seems to go correctly, the PS BD section independently synthesises, followed by the top level synthesis.

 

The bit file also generarates correctly.

 

Yet, I'm unable to export hardware in this mode, I get this error message, which is obviosly wrong as the bitfile does infact exist.Untitled.png

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Observer sumanku
Observer
29,776 Views
Registered: ‎04-02-2010

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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Vivado 2014.3/4 does not support OOC export2SDK post-bitstream flow.  This is planned for next release. Use the workaround suggested in the previous thread.

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12 Replies
Adventurer
Adventurer
25,763 Views
Registered: ‎01-23-2012

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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Make sure there are no spaces in the project path.

Participant debaere
Participant
25,727 Views
Registered: ‎05-29-2012

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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I have the same problem.

Design for ZC706  (7045), using Vivado 2014.3.

PS block diagram as OOC. The .bit file is generated.

I can "Export Hardware", if  "include.bit file." is not selected.

 

There are no spaces in the path.

 

wkr

Eddy

 

 

 

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25,712 Views
Registered: ‎10-24-2014

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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It seems like Vivado does not recognize the Zynq Processing System if using OOC mode and hence does not automatically execute the commands for .hwdef and .sysdef creation.

 

You can execute these steps manually after bitgen in the TCL console with the "write_hwdef" and "write_sysdef" commands.

 

Example:

 

set PROJECT_NAME "my_project"

set TOPLEVEL_NAME "toplevel"

 

write_hwdef -force -file ./$PROJECT_NAME.runs/synth_1/$TOPLEVEL_NAME.hwdef

write_sysdef -force -hwdef ./$PROJECT_NAME.runs/synth_1/$TOPLEVEL_NAME.hwdef -bitfile ./$PROJECT_NAME.runs/impl_1/$TOPLEVEL_NAME.bit -file ./$PROJECT_NAME.runs/impl_1/$TOPLEVEL_NAME.sysdef

 

After this you can export the design to SDK as usual.

 

Regards!

 

Ole

Observer sumanku
Observer
29,777 Views
Registered: ‎04-02-2010

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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Vivado 2014.3/4 does not support OOC export2SDK post-bitstream flow.  This is planned for next release. Use the workaround suggested in the previous thread.

View solution in original post

Xilinx Employee
Xilinx Employee
25,636 Views
Registered: ‎08-02-2007

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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Hi Ole,


Can you please mark this thread as solved?

 

--Hem

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25,484 Views
Registered: ‎10-24-2014

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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I'm not the thread owner ;-)

Regards,

Ole
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Explorer
Explorer
24,527 Views
Registered: ‎02-13-2012

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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Thanks Ole. 

 

I have one project that has this same error.  Your TCL commands solution worked.

 

 

Xilinx,

My project is a Microblaze based design, for a Kintex Ultrascale, developed in Vivado 2014.4, and is not using OOC mode.... Different tool version, different processor, different FPGA target, different build mode.  So none of those are likely to be root cause.  Has there been any further investigation into the root cause and implementing a solution into the tools?

 

Mark

 

 

 

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Participant tarthon
Participant
20,775 Views
Registered: ‎10-29-2014

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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Just ran into this in 2014.4 - what versions is everyone using?

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Visitor franz01
Visitor
17,039 Views
Registered: ‎04-19-2016

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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I had this issue, following a restore form Archive (as generated from Vivado).  Following the tcl commands to created the .sysdef fiile Export Hardware and including bit stream still did not work after it was confirmed the .sysdef was present in the run directory.

 

To resolve this I had to run "reset_project" in the tcl command window and rerun Synth, Implementation, and Generate Bit file.

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Newbie dgotrik
Newbie
7,158 Views
Registered: ‎04-05-2016

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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Posted this in another thread - but what worked for me was typing "cd <path to your project>" in the Tcl console .. Vivado doesn't set it to the correct project directory by default
Visitor gau_veldt
Visitor
5,967 Views
Registered: ‎10-22-2017

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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@sumanku wrote:

Vivado 2014.3/4 does not support OOC export2SDK post-bitstream flow.  This is planned for next release. Use the workaround suggested in the previous thread.


I still get this problem in Vivado 2017 whenever I create VHDL projects.  Though the TCL commands provided in a previous comment work it is tedious to have to retype those lines every time an evolving project is recompiled to a bitstream.

 

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Visitor mucsimarci
Visitor
5,839 Views
Registered: ‎12-09-2017

Re: Cannot Export Hardware: Hardware handoff file (.sysdef) does not exist

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Hello vikram_vk,

 

I had the same problem, figured out my project was missing the hdl wrapper. Make sure to have it done in yours, and make it the top module. 

 

Cheers,

Marci

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