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3,301 Views
Registered: ‎10-15-2010

Central DMA problem

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Hi,

 

I'm trying to use a XPS central DMA. Actually i connected it to the same PLB that my PPC440 and all other peripherals. I first try to do a simple write and read from BRAM to BRAM. bellow my code :

 


int x;
XDmaCentral mdma;
//XDmaCentral_SelfTest(&mdma);

x=XDmaCentral_Initialize(&mdma,0);
if (x != XST_SUCCESS)
{
    xil_printf("Error Initialize \n\r");
    return (XST_FAILURE);
}

XDmaCentral_Reset(&mdma);
XDmaCentral_SetControl(&mdma, XDMC_DMACR_SOURCE_INCR_MASK | XDMC_DMACR_DEST_INCR_MASK);   
                 
static u32  data[2]= {0x00000000,0x00000000};
static u32  data_0[2]= {0xabababab,0xecececec};
u32 len=2;
u32 RegValue;
xil_printf("data : 0x%08X\n\r", data);
xil_printf("data_0 : 0x%08X\n\r", data_0);

XGpio_mWriteReg((void*)data,0,0xDEAD0011);
xil_printf("DPRAMREAD : 0x%08X\n\r",XGpio_mReadReg((void*)data,0));

XDmaCentral_Transfer(&mdma,(void*)data_0,(void*)data,len);
   xil_printf("DMA_DA : 0x%08X\n\r", XDmaCentral_GetDestAddress(&mdma));
    xil_printf("DMA_SA : 0x%08X\n\r", XDmaCentral_GetSrcAddress(&mdma));
    xil_printf("DMA_DMACR : 0x%08X\n\r", XDmaCentral_GetControl(&mdma));
    xil_printf("DMA_DMASR : 0x%08X\n\r", XDmaCentral_GetStatus(&mdma));
    xil_printf("DMA_ISR : 0x%08X\n\r", XDmaCentral_InterruptStatusGet(&mdma));

do
{
    RegValue = XDmaCentral_GetStatus( &mdma );
    xil_printf("regvalue_reset:%x \n\r",RegValue);
}  while ((RegValue & XDMC_DMASR_BUSY_MASK) == XDMC_DMASR_BUSY_MASK);


if (RegValue &  ((XDMC_DMASR_BUS_ERROR_MASK)| XDMC_DMASR_BUS_TIMEOUT_MASK))
{
    xil_printf("entered error or timeout branch \n\r");
    XDmaCentral_Reset( &mdma );
    return XST_FAILURE;
}

int i=0;
while(i<2)
{                       
    xil_printf("data_dam : %x\n\r", data[i]);
    i++;
}

 

I have no error, everything seems to be ok, the status register say that the DMA is done but if i read the place where DMA should have been write data nothing is written.

In order to be sure that addresses on BRAM are available, i wrote by hand at the first address (0xDEAD0011) and then when i red data (data_dam) i see my "0xDEAD0011" but the next data is 0x00000000.

 

So why do i get no error but the DMA seems to not do his job ????

 

here a copy of my UART output after a try :

data : 0xFFFDDB48
data_0 : 0xFFFDD50C
DPRAMREAD : 0xDEAD0011
DMA_DA : 0xFFFDDB4A
DMA_SA : 0xFFFDD50E
DMA_DMACR : 0xC0000000
DMA_DMASR : 0x00000000
DMA_ISR : 0x00000001
regvalue_reset:0
data_dam : DEAD0011
data_dam : 0

 

Thank you

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1 Solution

Accepted Solutions
4,189 Views
Registered: ‎10-15-2010

Thanks for your answer.

It was just cause of a miscalculation of the read lenght.

View solution in original post

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3 Replies
karlk
Xilinx Employee
Xilinx Employee
3,254 Views
Registered: ‎08-21-2007
It might be a connection issue in the MHS. The crossbar on the 440 makes things a bit more complicated. Try double checking the connections and the crossbar configuration or posting the MHS here.
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4,190 Views
Registered: ‎10-15-2010

Thanks for your answer.

It was just cause of a miscalculation of the read lenght.

View solution in original post

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tsingray
Visitor
Visitor
3,172 Views
Registered: ‎03-25-2011

HI!

I wanna ask you that the miscalculation of read length means what ?

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