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uohuha
Visitor
Visitor
351 Views
Registered: ‎10-22-2019

Cortex-R5 disable store buffer

Hi,

to do some latency measurements on a ZCU102 board when writing from the R5 processor to AXI peripherals, I want to disable the store buffer to achieve comparable and reliable results (I assume my software is currently measuring the access time to the store buffer). According to the AXI specification, I would have to set the memory type to Normal Non-cacheable Non-bufferable. However, I can't find a configuration for the R5s MPU Region Access Control Registers to do this.

Is it in general possible to disable the store buffer? My measurements are based on bare metal C code written with the Xilinx SDK software.

Thanks in advance

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rgebauer
Contributor
Contributor
247 Views
Registered: ‎07-17-2017

Hi,

I am currently facing exactly the same issue.

Interestingly, I haven't had the problem when using a custom firmware together with FreeRTOS. (I also wrote about this here.) It only happens within a baremetal application and I really cannot tell why...

Any help would be highly appreciated. I hope someone from Xilinx will have an answer or maybe someone already solved this issue before...

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