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luminal101
Participant
Participant
699 Views
Registered: ‎02-10-2017

Custom UART IP as stdin/stdout in bsp

I have written a custom IP which has the same register definition as the AXI Uartlite IP core.

In the xparameters.h file of Xilinx SDK, I set the STDIN_BASEADDRESS and STDOUT_BASEADDRESS to the base address of my custom IP. This way, e.g. xil_printf outputs are sent to the custom IP.

How can I 'tell' the Xilinx SDK that my custom IP is a valid UART endpoint? I want to avoid editing the xparameters.h file, instead I would prefer to set it in Board Support Package Settings > standalone > stdin/stdout. However my custom IP is not available in the drop down menu (only the axi_uartlite is).

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florentw
Moderator
Moderator
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Registered: ‎11-09-2015

HI @luminal101 

I would say the BSP is looking for a setting in the driver file to know if a device can be stdout.

I would say use the driver for the AXI lite with your IP  (change the drivers name) and see what can be the required parameter. Probably someting in the files in Vitis/2020.1/data/embeddedsw/XilinxProcessorIPLib/drivers/uartlite_v3_4/data

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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stephenm
Xilinx Employee
Xilinx Employee
590 Views
Registered: ‎09-12-2007

“How can I 'tell' the Xilinx SDK that my custom IP is a valid UART endpoint? I want to avoid editing the xparameters.h file, instead I would prefer to set it in Board Support Package Settings > standalone > stdin/stdout.

However my custom IP is not available in the drop down menu (only the axi_uartlite is).

 

The tools use HSI API to read the cell properties. This is used to cross check against the drivers. The reason why you are only seeing the axi_uartlite is because, this is the only supported IP found:

https://github.com/Xilinx/embeddedsw/blob/master/lib/bsp/standalone/data/standalone.mld#L19

 

Also, the xparam file is auto generated, so no point making mods here. You need to make a local copy of the BSP and make the changes the MLD above, and add a custom driver too (if needed)

 

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841693/HSI+debugging+and+optimization+techniques

luminal101
Participant
Participant
536 Views
Registered: ‎02-10-2017

Here is what I did: 

1. In the .mdd file of my custom IP driver I added the lines (uart2delfi is the name of the custom IP):

	BEGIN INTERFACE stdin
      PROPERTY header = uart2delfi.h;
      FUNCTION name = inbyte, value = Uart2Delfi_RecvByte;
    END INTERFACE

    BEGIN INTERFACE stdout
      PROPERTY header = uart2delfi.h;
      FUNCTION name = outbyte, value = Uart2Delfi_SendByte;
    END INTERFACE

    BEGIN INTERFACE stdio
      PROPERTY header = uart2delfi.h;
      FUNCTION name = inbyte, value = Uart2Delfi_RecvByte;
      FUNCTION name = outbyte, value = Uart2Delfi_SendByte;
    END INTERFACE

 This is copied from the uartlite driver.

2. In the header file of the driver I added:

#define Uart2Delfi_RecvByte 	XUartLite_RecvByte
#define Uart2Delfi_SendByte		XUartLite_SendByte

 

Now the custom IP appears in the stdin/stdout drop-down list of the board support package.