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Adventurer
Adventurer
628 Views
Registered: ‎08-01-2018

DDR controller held in reset on SDK 2017.3

Hello,

 

     I have the following situation:

    I am debugging on SDK 2017.3 and at some point I get the message error described in the attachment.

    I am attaching to the target so there is no need to check the ps init routine as recommended for this type of error on similar threads.

    What possible issues could be for this issue?

 

Thanks,

      Mihaita

   

 

 

    

 

DDR_reset_1.PNG
DDR_reset_2.PNG
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Xilinx Employee
Xilinx Employee
584 Views
Registered: ‎10-06-2016

Hi @mivascu85

Did you initialize the DDR controller either using the FSBL or the ps7_init script when launching the debug session? When the device is powered up the DDR controller is not configured so you need to configure it according to your hardware platform configuration (HDF file exported from Vivado).

Regards


Ibai
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Adventurer
Adventurer
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Registered: ‎08-01-2018

Hello,

 

    Like I mentioned above I do not run as Standalone Application(therefore no ps7_init) but instead Attached to target. So there is nothing to initialize.

Thanks,

       Mihaita

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-06-2016

Hi @mivascu85

The fact of using "Atach to the running target" does not mean you don't need to initialize the memory. This debug type is commonly used when you boot the device from a valid boot image so the device is configured by your FSBL rather than the debugger.

Regards


Ibai
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Adventurer
Adventurer
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Registered: ‎08-01-2018

When I choose the option to attach it to target, I do not see the ps7_init and DDR initalization options. The FSBL is part of standard zc702 BSP I assume? For sure I don't have my own FSBL. I think those initalization you talk about are made already by the image that is already running on the target before I attach another firmware.

 

 Those options I saw only when debugging as standalone application. i have used Attach to target option fine until now without havind to initliaze something additionally. 

   I have attached a snapshot of SDK in this debug mode. Could you please point me to where I could check for options to initialize the memory?

 

Thanks,

       Mihaita

debugger.PNG
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Xilinx Employee
Xilinx Employee
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Registered: ‎10-06-2016

Hi @mivascu85,

As we both already mentioned the "Attach to running target" does not have any option to run the TCL script, because is commonly used to attach to a target that is already running and hence configured through the FSBL. The TCL script is part of your hardware platform project, not the BSP, and is based on the Vivado configurations exported to SDK.

What is not clear in your use case is which kind of boot image are you using on your side. Did you create the boot image? How did you create the FSBL? and the most important point, does the Vivado project used for the HDF file the DDR memory configured?

At the end of the day if your vivado configuration of the PS side does not have the DDR configured then neither the TCL script or the FSBL will initialize the DDR memory.

Regards


Ibai
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