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Visitor louis.vonau
Visitor
3,078 Views
Registered: ‎09-13-2017

DMA in SG multichannel on Ultrascale

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Hi,

 

I’m working actually on Ultrazed board (from Avnet IO Carrier Card) with a XCZU3EG engineering sample. I’m trying to get the Xilinx example “xaxidma_multichan_sg_int.c” to work but I have a problem. This code can be found there C:\Xilinx\SDK\2017.2\data\embeddedsw\XilinxProcessorIPLib\drivers\axidma_v9_3\examples.

 

First, I’m using Vivado 2017.2 on Window10. Below, you can see my design with a loop back architecture, as the example requires.

 

DMA_multi

The program should transmit 2 packets from the DMA to the 2 FIFOs (Each packet is sent into a different channel). Then, read it back and compare if the data are the same.

 

I’m already read those topics who helps me for some problem:

https://forums.xilinx.com/t5/Embedded-Development-Tools/Multi-channel-axi-dma-engine-implementation/m-p/312047/highlight/true#M26571

https://forums.xilinx.com/t5/Embedded-Development-Tools/Axi-DMA-in-SG-multi-channel-mode/m-p/558997/highlight/true#M34427

 

 

So, the example doesn’t work. Either the program get stuck in an infinite loop:

	/*
	 * Wait TX done and RX done
	 */
	while (((TxDone < NUMBER_OF_BDS_TO_TRANSFER) ||
		(RxDone < NUMBER_OF_BDS_TO_TRANSFER)) && !Error) {
		/* NOP */
	}

Or it’s fail with this message (yes, i don't always have the same result):

message_error.png

 

After debugging a little bit, I found that the reason of this message come from the TxIntrHandler function where we found :

/* Read pending interrupts */
	IrqStatus = XAxiDma_BdRingGetIrq(TxRingPtr);

	/* Acknowledge pending interrupts */
	XAxiDma_BdRingAckIrq(TxRingPtr, IrqStatus);

	/* If no interrupt is asserted, we do not do anything
	 */
	if (!(IrqStatus & XAXIDMA_IRQ_ALL_MASK)) {

		return;
	}

	/*
	 * If error interrupt is asserted, raise error flag, reset the
	 * hardware to recover from the error, and return with no further
	 * processing.
	 */
	if ((IrqStatus & XAXIDMA_IRQ_ERROR_MASK)) {

		Error = 1;

It’s seems that the function “XAxiDma_BdRingGetIrq(TxRingPtr)” retrieve the contents of the channel’s IRQ register called XADIMA_SR_OFFSET. But the result is: 0x00004000 corresponding to “Error interrupt”. The code above go to set Error = 1 and the code then print the message.

 

 * These masks are shared by XAXIDMA_CR_OFFSET register and
 * XAXIDMA_SR_OFFSET register
 * @{
 */
#define XAXIDMA_IRQ_IOC_MASK		0x00001000 /**< Completion intr */
#define XAXIDMA_IRQ_DELAY_MASK		0x00002000 /**< Delay interrupt */
#define XAXIDMA_IRQ_ERROR_MASK		0x00004000 /**< Error interrupt */
#define XAXIDMA_IRQ_ALL_MASK		0x00007000 /**< All interrupts */

 

For the “infinite loop” case, I think there is a problem with interruptions that never happens.

 

Finally, for test my design, I try the exact same architecture with the same code on a Zedboard (Zynq-7000). The program work and “Successfully ran AXI DMA SG interrupt example”.

 

So, I’m wonder :i

1) If my design is good with the Ultrascale?

2) Maybe there something to do more with it at the interruption level

3) I don’t always have the same comportment when I run the code and that’s strange. I’m working on an engineering sample, that’s why?

4) Does anybody already used the AXI DMA in multichannel mode on Ultrascale and encounter those problems?

5) Do I have made a silly error somewhere else?

 

I continue my search for now.

Thank you for your time,

Louis.

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1 Solution

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Xilinx Employee
Xilinx Employee
3,883 Views
Registered: ‎02-18-2014

Re: DMA in SG multichannel on Ultrascale

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Hi,

 

Can you try with the attached example and let us know the test result...

 

Thanks,
Kedar.

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11 Replies
Xilinx Employee
Xilinx Employee
3,884 Views
Registered: ‎02-18-2014

Re: DMA in SG multichannel on Ultrascale

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Hi,

 

Can you try with the attached example and let us know the test result...

 

Thanks,
Kedar.

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Visitor louis.vonau
Visitor
2,867 Views
Registered: ‎09-13-2017

Re: DMA in SG multichannel on Ultrascale

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Hi,

 

Thank you for your replay;

I test with this code and, great, it's work perfectly :

result.PNG

 

 

From what i saw, the differences with the example code in the SDK folder are :

#ifdef __aarch64__
#include "xil_mmu.h"
#endif

....

#define MARK_UNCACHEABLE        0x701

....

#ifdef __aarch64__
	Xil_SetTlbAttributes(TX_BD_SPACE_BASE, MARK_UNCACHEABLE);
	Xil_SetTlbAttributes(RX_BD_SPACE_BASE, MARK_UNCACHEABLE);
#endif



So, the problem come from MMU.

 

 

 

Thank you !  :)

Louis.

 

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Contributor
Contributor
1,577 Views
Registered: ‎05-10-2018

Re: DMA in SG multichannel on Ultrascale

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Hello @louis.vonau @appanad

 i am trying same example design with zc706 board,2_ch_dma.JPG

 

with same .c  file attached bellow. but it is giving  error as "data check failed" . please suggest some solution ,

 

thanks in advance,

 

 

regards,

Niranjan

 

 

 

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Visitor louis.vonau
Visitor
1,561 Views
Registered: ‎09-13-2017

Re: DMA in SG multichannel on Ultrascale

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Hello,

 

It's a long time that I didn't work on that, so I didn't really recall everything.

 

It seems you succeed to do a transfer but the CheckData function fail. Maybe try to observe the data you send and receive for find the problem. You can try to print the data or observe the transfer with ILA IP. Maybe just reverse the data on RX1 and RX0.

 

Plus, I'm not sure the mutlichannel with normal DMA IP is the right way now, maybe I'm wrong because finally I didn't use multichannel and I've been working on something else since. Xilinx release a IP called "AXI Multi Channel DMA" maybe it's better (not really sure about that, search need to be done).   

 

I'm afraid I can't really be more usefull, good luck!

Have a good day !

 

Regards,

Louis.

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Observer prakash.ganesh
Observer
1,317 Views
Registered: ‎09-12-2013

Re: DMA in SG multichannel on Ultrascale

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Can you help me the same thing for axi dma in multichannel scatter gather mode.

 

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Observer peterzh2018
Observer
476 Views
Registered: ‎08-16-2018

Re: DMA in SG multichannel on Ultrascale

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Thank you for your reply and the good question. I face the same problem on the ZCU102 board.  The attached figure is my bd (2018.2.1 vivado),  I use only one channel.  And  I  can't  recieve the  Tx and Rx  intrrupt using the example   xaxidma example sg_intr.c  in 2018.2.1 SDK.     

mmexport1562842103656.jpg
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Observer peterzh2018
Observer
470 Views
Registered: ‎08-16-2018

Re: DMA in SG multichannel on Ultrascale

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Why   the   xaxidma example sg_intr.c   is wrong?

IMG_20190711_185258.jpg
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Observer peterzh2018
Observer
450 Views
Registered: ‎08-16-2018

Re: DMA in SG multichannel on Ultrascale

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what's your mean ,  the differences with the example code in the SDK folder your  shown is same.  But what's the reason? I follow you and the Xilinx Employee, but  still an't recieve any intrruput. May be  the DMA setting about address and data cause it wrong. 

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Visitor louis.vonau
Visitor
436 Views
Registered: ‎09-13-2017

Re: DMA in SG multichannel on Ultrascale

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Hello,

It's been two years since I've worked on this and I've totally forgotten the differents problems I've had (and I don't really have time to go back there). I'm not going to be able to help more with that.

It's seems you didn't see the difference between DMA Scatter Gather and DMA Multichannel scatter gather. It's not excatly the same thing,(in multichannel, you can have several data producers on the same DMA). You should read the documentation for understand the difference, and choose what you need for your application. I'd rather say that, than try to explain to much, as I said, I've forgotten since two years, it's a little fuzzy and I prefer not to say wrong things.

Plus, I'm sure Xilinx change things because there now 2 IP :"DMA" and "MultiChannel DMA"and there certainly goods reasons for that. If you really want multichannel, go for the Multichannel DMA IP.

Method is very important and you need to understand step in the example code for find your problem. Use debbuger, ILA and other tools for understand how the IP work and how the transfers work. Often is just some problem with the name of Intr vector in xparamters.h or inversion with rx and tx, other time it's more complex.  To understand, I started with the easiest examples "simple_poll" then, when it's works, I take the next one and look at the differences. Maybe you already do that..so sorry for say thoses things.

One last thing, maybe you have a good reason for take a picture of your screen and post it but it's hard to see thing clearly, you're should really (when you can) use picture capture from the computer (screenshot tools are often already install by default - on kunbutu it's in HomeMenu/accesories/Screenshot).

Sorry for not helping more, Good luck!

Have a good day !

Regards,

Louis.

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Observer peterzh2018
Observer
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Registered: ‎08-16-2018

Re: DMA in SG multichannel on Ultrascale

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Thanks  for your kind help , I will try,  Thanks.

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Observer peterzh2018
Observer
409 Views
Registered: ‎08-16-2018

Re: DMA in SG multichannel on Ultrascale

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This is the bd \ dma \ stream data fifo setting, and the c code is your  attach.  I don't know why .

8QJTBT921{4X3O$00A4ZN}V.png
IRQK$E3(ELR2]}W]~EEK~3A.png
({8WPGA~C@1QO_IM(@~W6(G.png
K)1RQ7Y0WH8I)NJ)ENH`DJ9.png
1VZ$4F%ER2$]MUFBVDQ)F(2.png
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