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DMA in SG multichannel on Ultrascale

Posts: 1
Registered: ‎09-13-2017

DMA in SG multichannel on Ultrascale



I’m working actually on Ultrazed board (from Avnet IO Carrier Card) with a XCZU3EG engineering sample. I’m trying to get the Xilinx example “xaxidma_multichan_sg_int.c” to work but I have a problem. This code can be found there C:\Xilinx\SDK\2017.2\data\embeddedsw\XilinxProcessorIPLib\drivers\axidma_v9_3\examples.


First, I’m using Vivado 2017.2 on Window10. Below, you can see my design with a loop back architecture, as the example requires.



The program should transmit 2 packets from the DMA to the 2 FIFOs (Each packet is sent into a different channel). Then, read it back and compare if the data are the same.


I’m already read those topics who helps me for some problem:





So, the example doesn’t work. Either the program get stuck in an infinite loop:

	 * Wait TX done and RX done
	while (((TxDone < NUMBER_OF_BDS_TO_TRANSFER) ||
		(RxDone < NUMBER_OF_BDS_TO_TRANSFER)) && !Error) {
		/* NOP */

Or it’s fail with this message (yes, i don't always have the same result):



After debugging a little bit, I found that the reason of this message come from the TxIntrHandler function where we found :

/* Read pending interrupts */
	IrqStatus = XAxiDma_BdRingGetIrq(TxRingPtr);

	/* Acknowledge pending interrupts */
	XAxiDma_BdRingAckIrq(TxRingPtr, IrqStatus);

	/* If no interrupt is asserted, we do not do anything
	if (!(IrqStatus & XAXIDMA_IRQ_ALL_MASK)) {


	 * If error interrupt is asserted, raise error flag, reset the
	 * hardware to recover from the error, and return with no further
	 * processing.
	if ((IrqStatus & XAXIDMA_IRQ_ERROR_MASK)) {

		Error = 1;

It’s seems that the function “XAxiDma_BdRingGetIrq(TxRingPtr)” retrieve the contents of the channel’s IRQ register called XADIMA_SR_OFFSET. But the result is: 0x00004000 corresponding to “Error interrupt”. The code above go to set Error = 1 and the code then print the message.


 * These masks are shared by XAXIDMA_CR_OFFSET register and
 * @{
#define XAXIDMA_IRQ_IOC_MASK		0x00001000 /**< Completion intr */
#define XAXIDMA_IRQ_DELAY_MASK		0x00002000 /**< Delay interrupt */
#define XAXIDMA_IRQ_ERROR_MASK		0x00004000 /**< Error interrupt */
#define XAXIDMA_IRQ_ALL_MASK		0x00007000 /**< All interrupts */


For the “infinite loop” case, I think there is a problem with interruptions that never happens.


Finally, for test my design, I try the exact same architecture with the same code on a Zedboard (Zynq-7000). The program work and “Successfully ran AXI DMA SG interrupt example”.


So, I’m wonder :i

1) If my design is good with the Ultrascale?

2) Maybe there something to do more with it at the interruption level

3) I don’t always have the same comportment when I run the code and that’s strange. I’m working on an engineering sample, that’s why?

4) Does anybody already used the AXI DMA in multichannel mode on Ultrascale and encounter those problems?

5) Do I have made a silly error somewhere else?


I continue my search for now.

Thank you for your time,