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Registered: ‎04-16-2009

Debug in multi-microblaze systems

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Hi, I'm mastering dual Microblaze debug. A tutorial at http://wiki.nus.edu.sg/download/attachments/94142607/Lab3_with_HWv3.pdf?version=1&modificationDate=1349705761190 says that we need MDM connected to PLB0-MB0

 

Untitled.png

 

I see that MDM has also purple connections with both MBlazes. Then, tutorial says "Configure the STDIN and STDOUT of both the microblazes to be mdm_0". SDK has mdm option in the BSB standalone project. However, it is available only for MB0. How do I enable MDM output for the other microblaze?I go to XPS and see that MDM can be enabled only for MB0

 

XPS debug configuration

 

I therefore keep using UARTs for both microblazes instead of MDM. UART_1, connected to the second microblaze, has no connection to PC. Nevertheless, when I start the app, I start receiving the Hello World from it! I am sure that it is second microblaze because it is only one connected to the LEDs and makes em blinking. Meantime, messages from the first MB stop. How is it possible? How is it possible that messages sent to detached UART_1 reach PC through UART_0 from the microblaze that is not connected to UART_0 at all? Thereby, terminating the app at MB1, stops only messages arriving from UART. The LEDs are still blinking, so the app is still running. They stop blinking when I run the app at MB0 despite the launch configuration is to reset MB0 only, not the system. Why the processor goes on running when it must stop and stops when it should not? I do not understand anything.

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Registered: ‎04-16-2009

Re: Debug in multi-microblaze systems

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Surprisingly, I have regenerated the lscript.ld for both processors and, despite the memory regions stayed the same

 available memory

 

the processors run simultaneously now! I suspect that it is because all sections are in the ilmb_cntlr_1_dlmb_cntlr_1 now instead of ddr2_sdram_MPMC_BASEADDR, as it was by default

 

section -> mem region

 

 

and every processor has a separate cache whereas SDRAM is shared. Executed from the cache, the processurs run 20 times faster now.

 

Where can I find the lscript.ld specification?

 

 

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2,947 Views
Registered: ‎04-16-2009

Re: Debug in multi-microblaze systems

Jump to solution

Surprisingly, I have regenerated the lscript.ld for both processors and, despite the memory regions stayed the same

 available memory

 

the processors run simultaneously now! I suspect that it is because all sections are in the ilmb_cntlr_1_dlmb_cntlr_1 now instead of ddr2_sdram_MPMC_BASEADDR, as it was by default

 

section -> mem region

 

 

and every processor has a separate cache whereas SDRAM is shared. Executed from the cache, the processurs run 20 times faster now.

 

Where can I find the lscript.ld specification?

 

 

View solution in original post

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