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jerrylipeng
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Registered: ‎06-30-2009

Does anyone has a demo project using axi_pcie?

I am trying to create a XPS project to test the axi_pcie core. I'm using ML605.

I am not quite clear about the details and cannot find any examples:(

What I want to know is:

- How to connect clock signals? Shall I connect AXI_ACLK_OUT to AXI_ACLK directly?

- It is said in the datasheet that "the MMCS_LOCK output must be connected to the DCM_Locked input of the Proc_Sys_Reset module", but DCM_Locked is already to an output of clock_generator.

- Should I insert pcie pin assignments into system.ucf?

...

Oh I really don't know how to make it work.

Dose anyone has a demo project? Then I can take it as a reference.

Thanks:)

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ywu
Xilinx Employee
Xilinx Employee
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Registered: ‎11-28-2007

http://www.xilinx.com/support/answers/43371.htm

 


@jerrylipeng wrote:

I am trying to create a XPS project to test the axi_pcie core. I'm using ML605.

I am not quite clear about the details and cannot find any examples:(

What I want to know is:

- How to connect clock signals? Shall I connect AXI_ACLK_OUT to AXI_ACLK directly?

- It is said in the datasheet that "the MMCS_LOCK output must be connected to the DCM_Locked input of the Proc_Sys_Reset module", but DCM_Locked is already to an output of clock_generator.

- Should I insert pcie pin assignments into system.ucf?

...

Oh I really don't know how to make it work.

Dose anyone has a demo project? Then I can take it as a reference.

Thanks:)




Cheers,
Jim
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jerrylipeng
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Registered: ‎06-30-2009

Thanks Jim
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