03-06-2008 07:34 PM
03-07-2008 12:28 AM - edited 03-07-2008 12:29 AM
05-07-2014 04:28 PM
Is it possible if I just change the C_DEPTH within the within uartlite_tx/rx.vhdl file shouldn't it work I notice the fifo is setup as generic.
I'mt using proc_common_v3_00_a.srl_fifo_f for the fido and the uartlite is version 1.02a