UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Participant sshilpa
Participant
7,731 Views
Registered: ‎02-12-2008

EDK 10.1 -BFM simulation

Hi All,

I have EDK 10.1 and modelsim6.1e version.

Are these compatible?

Please let me know which version of Modelsim SE should be used with EDK 10.1

When I run Simulatiom Library compilation wizard, ISE libraries get compiled without any errors.

When I run EDK simulation libraries, it gets compiled but but shows

"No. of compile errors found:85". Doesn't say what is the error.

I have pasted the summary below 

ISE Simulation Library Path:
C:\edk_ise_sim_lib_10\ISE\
Number of compile errors found: 0

EDK Simulation Library Path:
C:\edk_ise_sim_lib_10\EDK\
Compilation Option: Deprecated and obsolete components are not compiled.

 

 

After doing this, when I execute this command in the EDK_shell,

 


Number of compile errors found: 85


Simulator: mti
Simulator Version: Model Technology ModelSim SE vsim 6.1e Simulator 2006.03 Mar  8 2006

Supported HDL: both VHDL and Verilog

Smartmodel Installation Path:
C:\Xilinx\10.1\ISE\smartmodel\nt\installed_nt\

 

After executing the below command in the EDK_shell 

'make -f bfm_sim_cmd.make sim' , I get the following errors in the modelsim window

 -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# ** Error: (vcom-19) Failed to access library 'unisim' at "unisim".
# No such file or directory. (errno = ENOENT)
# ** Error: c:/Modeltech_6.1e/win32/vcom failed.
# Error in macro ./bfm_system.do line 48

# c:/Modeltech_6.1e/win32/vcom failed.
#     while executing
# "vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/pselect.vhd""

 

Please let me know is there is any setting required to run this? Or should I go for a different version of modelsim..

 

Thanks,

Shilpa

0 Kudos
5 Replies
Scholar golson
Scholar
7,718 Views
Registered: ‎04-07-2008

Re: EDK 10.1 -BFM simulation

What statement is on line 48 of bfm_system.do?
0 Kudos
Participant sshilpa
Participant
7,698 Views
Registered: ‎02-12-2008

Re: EDK 10.1 -BFM simulation

Hi Gary,

 

Thanks for the reply.It has  this vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_slave_comp.vhd"

on line 40

 

I have copy pasted the entire file below.

#  Simulation Model Generator
#  Xilinx EDK 10.1 EDK_K.15
#  Copyright (c) 1995-2008 Xilinx, Inc.  All rights reserved.
#
#  File     bfm_system.do (Thu Jul 10 16:43:08 2008)
#
vlib plb_bfm
vmap plb_bfm plb_bfm
vlib plb_master_bfm_v1_00_a
vmap plb_master_bfm_v1_00_a plb_master_bfm_v1_00_a
vlib plb_slave_bfm_v1_00_a
vmap plb_slave_bfm_v1_00_a plb_slave_bfm_v1_00_a
vlib plb_monitor_bfm_v1_00_a
vmap plb_monitor_bfm_v1_00_a plb_monitor_bfm_v1_00_a
vlib bfm_synch_v1_00_a
vmap bfm_synch_v1_00_a bfm_synch_v1_00_a
vlib proc_common_v1_00_b
vmap proc_common_v1_00_b proc_common_v1_00_b
vlib plb_v34_v1_02_a
vmap plb_v34_v1_02_a plb_v34_v1_02_a
vlib proc_common_v2_00_a
vmap proc_common_v2_00_a proc_common_v2_00_a
vlib wrpfifo_v2_00_a
vmap wrpfifo_v2_00_a wrpfifo_v2_00_a
vlib rdpfifo_v2_00_a
vmap rdpfifo_v2_00_a rdpfifo_v2_00_a
vlib plb_ipif_v1_00_f
vmap plb_ipif_v1_00_f plb_ipif_v1_00_f
vlib sel_clk_v1_00_a
vmap sel_clk_v1_00_a sel_clk_v1_00_a
vlib sel_clk_tb_v1_00_a
vmap sel_clk_tb_v1_00_a sel_clk_tb_v1_00_a
vlib work
vmap work work
vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_dcl.vhd"
vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_pkg.vhd"
vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_master_comp.vhd"
vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_master3x.vhd"
vcom -novopt -93 -work plb_master_bfm_v1_00_a "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_master_bfm_v1_00_a/hdl/vhdl/plb_master_bfm.vhd"
vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_slave_comp.vhd"
vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_slave3x.vhd"
vcom -novopt -93 -work plb_slave_bfm_v1_00_a "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_slave_bfm_v1_00_a/hdl/vhdl/plb_slave_bfm.vhd"
vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_monitor_comp.vhd"
vcom -novopt -93 -work plb_bfm "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_bfm/hdl/vhdl/plb_monitor3x.vhd"
vcom -novopt -93 -work plb_monitor_bfm_v1_00_a "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/plb_monitor_bfm_v1_00_a/hdl/vhdl/plb_monitor_bfm.vhd"
vcom -novopt -93 -work bfm_synch_v1_00_a "C:/Xilinx/10.1/EDK/hw/XilinxBFMinterface/pcores/bfm_synch_v1_00_a/hdl/vhdl/bfm_synch.vhd"
vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/proc_common_pkg.vhd"
vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/pselect.vhd"
vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/down_counter.vhd"
vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/mux_onehot.vhd"
vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/or_bits.vhd"
vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/or_muxcy.vhd"
vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/or_gate.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/arb_addr_sel.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/arb_control_sm.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/bus_control.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/arb_registers.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/bus_lock_sm.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/dcr_regs.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/gen_qual_req.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/muxed_signals.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/pend_request.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/qual_priority.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/pending_priority.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/qual_request.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/priority_encoder.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/plb_priority_encoder.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/watchdog_timer.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/plb_wr_datapath.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/plb_rd_datapath.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/plb_addrpath.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/plb_slave_ors.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/plb_interrupt.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/plb_arbiter_logic.vhd"
vcom -novopt -93 -work plb_v34_v1_02_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v34_v1_02_a/hdl/vhdl/plb_v34.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/proc_common_pkg.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/family.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/or_muxcy.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/or_gate.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pselect.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/inferred_lut4.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/srl_fifo2.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/counter_bit.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/counter.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/ipif_pkg.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/ipif_steer.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter_bit.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter_top.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_occ_counter.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_occ_counter_top.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_adder_bit.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_adder.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_dpram_select.vhd"
vcom -novopt -93 -work proc_common_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/srl16_fifo.vhd"
vcom -novopt -93 -work wrpfifo_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v2_00_a/hdl/vhdl/pf_dly1_mux.vhd"
vcom -novopt -93 -work wrpfifo_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v2_00_a/hdl/vhdl/wrpfifo_dp_cntl.vhd"
vcom -novopt -93 -work wrpfifo_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v2_00_a/hdl/vhdl/ipif_control_wr.vhd"
vcom -novopt -93 -work wrpfifo_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v2_00_a/hdl/vhdl/wrpfifo_top.vhd"
vcom -novopt -93 -work rdpfifo_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v2_00_a/hdl/vhdl/rdpfifo_dp_cntl.vhd"
vcom -novopt -93 -work rdpfifo_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v2_00_a/hdl/vhdl/ipif_control_rd.vhd"
vcom -novopt -93 -work rdpfifo_v2_00_a "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v2_00_a/hdl/vhdl/rdpfifo_top.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/flex_addr_cntr.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/addr_reg_cntr_brst_flex.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/plb_address_decoder.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/burst_support.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/plb_slave_attachment_indet.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/plb_sesr_sear.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/plb_ipif_reset.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/plb_interrupt_control.vhd"
vcom -novopt -93 -work plb_ipif_v1_00_f "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_ipif_v1_00_f/hdl/vhdl/plb_ipif.vhd"
vcom -novopt -93 -work sel_clk_v1_00_a "D:/ml403/mux_clocks/pcores/sel_clk_v1_00_a/hdl/vhdl/user_logic.vhd"
vcom -novopt -93 -work sel_clk_v1_00_a "D:/ml403/mux_clocks/pcores/sel_clk_v1_00_a/hdl/vhdl/sel_clk.vhd"
vcom -novopt -93 -work sel_clk_tb_v1_00_a "D:/ml403/mux_clocks/pcores/sel_clk_v1_00_a/devl/bfmsim/pcores/sel_clk_tb_v1_00_a/simhdl/vhdl/sel_clk_tb.vhd"
vcom -novopt -93 -work work "bfm_processor_wrapper.vhd"
vcom -novopt -93 -work work "bfm_memory_wrapper.vhd"
vcom -novopt -93 -work work "bfm_monitor_wrapper.vhd"
vcom -novopt -93 -work work "synch_bus_wrapper.vhd"
vcom -novopt -93 -work work "plb_bus_wrapper.vhd"
vcom -novopt -93 -work work "my_core_wrapper.vhd"
vcom -novopt -93 -work work "bfm_system.vhd"

0 Kudos
Participant sshilpa
Participant
7,693 Views
Registered: ‎02-12-2008

Re: EDK 10.1 -BFM simulation

or which I got from modelsim se-6.3d

 

# ** Error: C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/pselect.vhd(73): Library unisim not found.
# ** Error: C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/pselect.vhd(74): (vcom-1136) Unknown identifier "unisim".
# ** Error: C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/pselect.vhd(93): VHDL Compiler exiting
# ** Error: c:/Modeltech_6.3d/win32/vcom failed.
# Error in macro ./bfm_system.do line 48
# c:/Modeltech_6.3d/win32/vcom failed.
#     while executing
# "vcom -novopt -93 -work proc_common_v1_00_b "C:/Xilinx/10.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v1_00_b/hdl/vhdl/pselect.vhd""

 

It is not able to locate unisim library

0 Kudos
Xilinx Employee
Xilinx Employee
7,689 Views
Registered: ‎08-07-2007

Re: EDK 10.1 -BFM simulation

Hi,

 

Please check the log file of compiling EDK simulation library and see what the errors are. The log file can be found in the directory of the compiled libraries.

 

-XF

0 Kudos
Newbie shaq1
Newbie
4,983 Views
Registered: ‎03-03-2010

Re: EDK 10.1 -BFM simulation

Hi,

When I simulate my model (schematic) after giving levels to my input. I am getting the following error in modelsim when I am clicking on "Simulate behavioral VHDL model".

 

** Error: (vcom-19) Failed to access library 'unisim' at "unisim".
# No such file or directory. (errno = ENOENT)
# ** Error: C:/Modeltech_6.1e/win32/vcom failed.
# Error in macro ./bilal.fdo line 5
# C:/Modeltech_6.1e/win32/vcom failed.
#     while executing
# "vcom -explicit  -93 "syed.vhf""

 

Using following versions

Xilinx:10.1i, ModelSim: 6.1e

 

Thanks

Syed

0 Kudos