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Voyager
Voyager
4,913 Views
Registered: ‎02-10-2012

Faster AXI IO interface than GPIO?

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Hey everyone!

 

Turns out that the GPIO performance is not good enough in the project i am working on. My project implements a handshake mechanism which needs a performance to the level of nano seconds.

 

My current handshake mechanism using the GPIO read and write functions (XGpio_ReadReg and XGpio_WriteReg) takes about a few micro seconds.  Is there any better interface than the GPIO to implement an interface between the external signals and the AXI interface of the microblaze ?

 

I am using the Spartan 6 SP601 Evluation board.  Any tips would be appreciated :)

 

Thanks in advance.

 

 

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Scholar austin
Scholar
6,420 Views
Registered: ‎02-27-2008

Re: Faster AXI IO interface than GPIO?

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a,

 

If you need 'nanoseconds', you should not be using a processor, but doing everything you need in VHDL (or verilog).


Even then, the fastest clock you will be able to have is probably 200 MHz or so, which means one operation every 5ns, at best.

 

If that is not fast enough, then even if you go to a Virtex 7 device, with 700 MHz internal clock, so are still just under 2ns per operation....

 

It will not be a question of the bus interface on a microprocessor, but the fact that microprocessors must execute many instructions to get anything done, at all.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
4 Replies
Scholar austin
Scholar
6,421 Views
Registered: ‎02-27-2008

Re: Faster AXI IO interface than GPIO?

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a,

 

If you need 'nanoseconds', you should not be using a processor, but doing everything you need in VHDL (or verilog).


Even then, the fastest clock you will be able to have is probably 200 MHz or so, which means one operation every 5ns, at best.

 

If that is not fast enough, then even if you go to a Virtex 7 device, with 700 MHz internal clock, so are still just under 2ns per operation....

 

It will not be a question of the bus interface on a microprocessor, but the fact that microprocessors must execute many instructions to get anything done, at all.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
Voyager
Voyager
4,888 Views
Registered: ‎02-10-2012

Re: Faster AXI IO interface than GPIO?

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Thank you so much Austin!

 

Initially when i started the project I had a small hunch that i would have to code it in VHDL for getting a nano second performance, however i chose to go with the GPIO as it seemed easy to integrate it into my application C code. I will try and implement this suggestion now.

 

Thanks again

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Scholar austin
Scholar
4,881 Views
Registered: ‎02-27-2008

Re: Faster AXI IO interface than GPIO?

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a,

 

As my good friend Peter Alfke used to say "if you can do it with a uP, then do it!"

 

Yes, if a microprocessor, and c code solves the problem, then that is clearly the fastest way to get to the solution.

 

FPGA devices are great for many applications, and less so for many others:  it is the designer's skill that leads to the right choice of components to provide the best solution.

Austin Lesea
Principal Engineer
Xilinx San Jose
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Xilinx Employee
Xilinx Employee
4,879 Views
Registered: ‎08-06-2007

Re: Faster AXI IO interface than GPIO?

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Hi,

 

As Austin says, if you need nanoseconds response, a processor is too slow.

However you can get faster GPIO  for MicroBlaze than using AXI GPIO.

 

Using the FSL will get you the fastest GPIO that MicroBlaze can provide.

It will take MicroBlaze 1 clock cycle set set new output values and MicroBlaze will be able to read new input values in one clock cycle.

 

That is the fastest MicroBlaze can do.

 

Göran

 

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