04-22-2010 12:17 AM
The hardware specification file given in xapp1026.zip is targeted to xps_ethernetlite v2.01 a, however in SDK 11.4, the xps_ethernetlite version is 3.01a, which introduces pins like PHY_MDC, PHY_MDIO_I, PHY_MDIO_O,PHY_MDIO and so on. How should I specify the connections for these newly introduced pins? I also find out that the PHY_rst_n for ethernetlite v3.01a is No Connection however for v2.01a it is connected to fpga_0_Ethernet_MAC_PHY_rst_n_pin, anyone can explains for me? And in order to use the socket applications can anyone provide the mhs file for xps_ethernetlite v3.01a ?
Many Great Thanks!
09-02-2010 08:29 AM
I have quite the same issue.
I use EDK 12.2 to generate my system (with ethLite core), Linux runs well using http://xilinx.wikidot.com/microblaze-linux
However when booting, I have the following error :
xilinx_emaclite 81000000.ethernet: Device Tree Probing
xilinx_emaclite 81000000.ethernet: error registering MDIO bus
xilinx_emaclite 81000000.ethernet: MAC address is now 00:0a:35:ba:08:00
xilinx_emaclite 81000000.ethernet: Xilinx EmacLite at 0x81000000 mapped to 0xD2120000, irq=3
As you said MDIO bus is not entirely connected
PHY_MDIO_I, PHY_MDIO_O and PHY_MDIO_T have no connection when locking ports tab in EDK.
I'm not really sure, but this issue seems to prevent Ethernet cable connection auto-detect by kernel.
But maybe I'm wrong.
How do we connect these three pins in the design ?
12-13-2010 11:43 AM
In my design (based on SP601 and base system builder) is the phy_mdio signal connected to a bidir IO buffer.
The _I, _O and _T signals are for example useful if your XPS design is a sub-design in ISE but normally not necessary if using XPS only.
I still do have this error that the MDIO bus could not be registered and I simply ignored it as it worked. Now I want to connect the board to a new (1Gb) Ethernet switch and I am facing what you get. Did you solve the issue?
I think there is an additional entry in the dts file necessary.
Maybe the Xilinx people have an answer here.
12-14-2010 06:23 AM
I did not solve the issue : still the error message about registering MDIO bus.
Like you I just ignore this error since my Ethernet works well.
However I tried also to connect my design to a giga-bit switch and it doesn't work.
I do not investigate further but I think that it is a matter of speed negociation.
I hope also that a Xilinx guy got the solution.
PS : I use a ML605 board and Linux from http://xilinx.wikidot.com/microblaze-linux