UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor catalinamas
Visitor
1,618 Views
Registered: ‎06-04-2008

How can I change the mode pins to JATG/BSCAN???

Hi, I find a solution for my problem  "Spartan-3E Starter Kit created design fails DDR Memory Test"

 

This are the solutions:

Solution

Solution 1:
Change the mode pins to JTAG/BSCAN by removing the jumpers from M0 and M2 and keeping the jumper on M1.


Solution 2:
If you have the OPB Ethernet in the design, please refer to SR 23812. BUFGs are unnecessarily inserted in the RX and TX clock paths.

 

The Solution1 is my solution but I don't know how I can change the mode pins.. anyone knows how I can?? 

 

 

Thanks and sorry my english!

 

0 Kudos