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Observer eugen86
Observer
10,139 Views
Registered: ‎04-06-2009

How can I write the status of the DIP-Switches into a Software Accessible Register (PLB v4.6 slave)

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Hi,

 

First of all, I am using XPS & SDK 10., Microblaze, PLBv4.6 slave and the Virtex2pro Developement Board.

 

My plan is:

 

-to write the status of the DIP Switches into slv_reg, 

-to connect slv_reg1 with the on board LEDs

-to copy slv_reg0 into slv_reg1 with a C code.

 

My Problem is: Where in the user_logic.vhd can I connect the DIP_Data with slv_reg0 ?

 

 The problem with my code is that it only checks the dip status /  sets the LED once after programming.

 

Is my idea possible? If not, does somebody have another idea how i can solv my problem?

 

I attached my user_logic.vhd and my C code.

 

 

-----------------------------------------------------------------------------
-- Filename: user_logic.vhd
-- Version: 1.00.a
-- Description: User logic.
-- Date: Fri Apr 03 13:50:06 2009 (by Create and Import Peripheral Wizard)
-- VHDL Standard: VHDL'93
------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port: "*_i"
-- device pins: "*_pin"
-- ports: "- Names begin with Uppercase"
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>"
------------------------------------------------------------------------------

-- DO NOT EDIT BELOW THIS LINE --------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

library proc_common_v2_00_a;
use proc_common_v2_00_a.proc_common_pkg.all;

-- DO NOT EDIT ABOVE THIS LINE --------------------

--USER libraries added here

------------------------------------------------------------------------------
-- Entity section
------------------------------------------------------------------------------
-- Definition of Generics:
-- C_SLV_DWIDTH -- Slave interface data bus width
-- C_NUM_REG -- Number of software accessible registers
--
-- Definition of Ports:
-- Bus2IP_Clk -- Bus to IP clock
-- Bus2IP_Reset -- Bus to IP reset
-- Bus2IP_Data -- Bus to IP data bus
-- Bus2IP_BE -- Bus to IP byte enables
-- Bus2IP_RdCE -- Bus to IP read chip enable
-- Bus2IP_WrCE -- Bus to IP write chip enable
-- IP2Bus_Data -- IP to Bus data bus
-- IP2Bus_RdAck -- IP to Bus read transfer acknowledgement
-- IP2Bus_WrAck -- IP to Bus write transfer acknowledgement
-- IP2Bus_Error -- IP to Bus error response
------------------------------------------------------------------------------

entity user_logic is
generic
(
-- ADD USER GENERICS BELOW THIS LINE ---------------
--USER generics added here
-- ADD USER GENERICS ABOVE THIS LINE ---------------

-- DO NOT EDIT BELOW THIS LINE ---------------------
-- Bus protocol parameters, do not add to or delete
C_SLV_DWIDTH : integer := 32;
C_NUM_REG : integer := 2
-- DO NOT EDIT ABOVE THIS LINE ---------------------
);
port
(
-- ADD USER PORTS BELOW THIS LINE ------------------
LED_Data : out std_logic_vector(0 to 3);
DIP_Data : in std_logic_vector(0 to 3);
-- ADD USER PORTS ABOVE THIS LINE ------------------

-- DO NOT EDIT BELOW THIS LINE ---------------------
-- Bus protocol ports, do not add to or delete
Bus2IP_Clk : in std_logic;
Bus2IP_Reset : in std_logic;
Bus2IP_Data : in std_logic_vector(0 to C_SLV_DWIDTH-1);
Bus2IP_BE : in std_logic_vector(0 to C_SLV_DWIDTH/8-1);
Bus2IP_RdCE : in std_logic_vector(0 to C_NUM_REG-1);
Bus2IP_WrCE : in std_logic_vector(0 to C_NUM_REG-1);
IP2Bus_Data : out std_logic_vector(0 to C_SLV_DWIDTH-1);
IP2Bus_RdAck : out std_logic;
IP2Bus_WrAck : out std_logic;
IP2Bus_Error : out std_logic
-- DO NOT EDIT ABOVE THIS LINE ---------------------
);

attribute SIGIS : string;
attribute SIGIS of Bus2IP_Clk : signal is "CLK";
attribute SIGIS of Bus2IP_Reset : signal is "RST";

end entity user_logic;

------------------------------------------------------------------------------
-- Architecture section
------------------------------------------------------------------------------

architecture IMP of user_logic is

--USER signal declarations added here, as needed for user logic
signal DIP_Data2 : std_logic_vector(0 to 7);
------------------------------------------
-- Signals for user logic slave model s/w accessible register example
------------------------------------------
signal slv_reg0 : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_reg1 : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_reg_write_sel : std_logic_vector(0 to 1);
signal slv_reg_read_sel : std_logic_vector(0 to 1);
signal slv_ip2bus_data : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_read_ack : std_logic;
signal slv_write_ack : std_logic;
begin

LED_Data(0 to 3) <= slv_reg1(28 to 31);

------------------------------------------
-- Example code to read/write user logic slave model s/w accessible registers
--
-- Note:
-- The example code presented here is to show you one way of reading/writing
-- software accessible registers implemented in the user logic slave model.
-- Each bit of the Bus2IP_WrCE/Bus2IP_RdCE signals is configured to correspond
-- to one software accessible register by the top level template. For example,
-- if you have four 32 bit software accessible registers in the user logic,
-- you are basically operating on the following memory mapped registers:
--
-- Bus2IP_WrCE/Bus2IP_RdCE Memory Mapped Register
-- "1000" C_BASEADDR + 0x0
-- "0100" C_BASEADDR + 0x4
-- "0010" C_BASEADDR + 0x8
-- "0001" C_BASEADDR + 0xC
--
-- ------------------------------------------
slv_reg_write_sel <= Bus2IP_WrCE(0 to 1);
slv_reg_read_sel <= Bus2IP_RdCE(0 to 1);
slv_write_ack <= Bus2IP_WrCE(0) or Bus2IP_WrCE(1);
slv_read_ack <= Bus2IP_RdCE(0) or Bus2IP_RdCE(1);

-- implement slave model software accessible register(s)
SLAVE_REG_WRITE_PROC : process( Bus2IP_Clk ) is
begin

if (Bus2IP_Clk'event and Bus2IP_Clk = '1') then
if Bus2IP_Reset = '1' then
slv_reg0 <= (others => '0');
slv_reg1 <= (others => '0');
else
case slv_reg_write_sel is
when "10" =>
for byte_index in 0 to (C_SLV_DWIDTH/8)-1 loop
if ( Bus2IP_BE(byte_index) = '1' ) then
slv_reg0(byte_index*8 to byte_index*8+7) <= Bus2IP_Data(byte_index*8 to byte_index*8+7);
end if;
end loop;
when "01" =>
for byte_index in 0 to (C_SLV_DWIDTH/8)-1 loop
if ( Bus2IP_BE(byte_index) = '1' ) then
slv_reg1(byte_index*8 to byte_index*8+7) <= Bus2IP_Data(byte_index*8 to byte_index*8+7);
end if;
end loop;
when others => null;
end case;
end if;
end if;

end process SLAVE_REG_WRITE_PROC;

-- implement slave model software accessible register(s) read mux
SLAVE_REG_READ_PROC : process( slv_reg_read_sel, slv_reg0, slv_reg1, DIP_Data ) is
begin

case slv_reg_read_sel is
when "10" => slv_ip2bus_data <= DIP_Data; -- slv_reg0;
when "01" => slv_ip2bus_data <= slv_reg1;
when others => slv_ip2bus_data <= (others => '0');
end case;

end process SLAVE_REG_READ_PROC;

------------------------------------------
-- Example code to drive IP to Bus signals
------------------------------------------

IP2Bus_Data <= slv_ip2bus_data when slv_read_ack = '1' else
(others => '0');
IP2Bus_WrAck <= slv_write_ack;
IP2Bus_RdAck <= slv_read_ack;
IP2Bus_Error <= '0';

end IMP;

 

 

#include "xparameters.h"
#include "fpgadevtut2reg.h"

int main (void) {

int * reg0pointer=NULL;
int * reg1pointer=NULL;

reg0pointer = (XPAR_FPGADEVTUT2REG_0_BASEADDR + FPGADEVTUT2REG_SLV_REG0_OFFSET);
reg1pointer = (XPAR_FPGADEVTUT2REG_0_BASEADDR + FPGADEVTUT2REG_SLV_REG1_OFFSET);

while(1){
*reg1pointer =*reg0pointer;
}
return 0;
}

 

I hope anybody can help me ....

 

 

 

 

Message Edited by eugen86 on 04-07-2009 10:49 AM
Message Edited by eugen86 on 04-07-2009 10:55 AM
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1 Solution

Accepted Solutions
Observer eugen86
Observer
13,004 Views
Registered: ‎04-06-2009

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

Jump to solution

Hi, I solved it !!!!!

 

The pointer in my C-Code had the wrong type. It must have been "Xuint32" not "int". I guess the program ran until the line

 

*reg1pointer =*reg0pointer;

 and the microblaze freezed or got an error or sth. at this line. Therefore only the status of the DIPs after programming was shown on the LEDs.

I changed my code and use the example functions which you suggested me to use.

 

Thank you very much for your support !!

 

One question is left: How can I check if the microblaze has an error with my code?. Do you know a tutorial which shows how to debug a microblaze system or how to read error messages out of it without the use of RS232. (I got a laptop without RS232 :(  )

 

 

Here my working C-Code:

 

 #include "xparameters.h"
#include "fpgadevtut2reg.h"

int main (void) {

while(1){
FPGADEVTUT2REG_mWriteSlaveReg1(XPAR_FPGADEVTUT2REG_0_BASEADDR,0,FPGADEVTUT2REG_mReadSlaveReg0(XPAR_FPGADEVTUT2REG_0_BASEADDR,0));
}
return 0;
}


 

 

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11 Replies
Scholar golson
Scholar
10,125 Views
Registered: ‎04-07-2008

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

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How about using concatenation in VHDL, something like this?

 

 

 

-- implement slave model software accessible register(s) read mux 
SLAVE_REG_READ_PROC : process( slv_reg_read_sel, slv_reg0, slv_reg1, DIP_Data ) is 
begin
   case slv_reg_read_sel is     
      when "10" => slv_ip2bus_data <= slv_reg0(0 to 27) & DIP_Data; -- slv_reg0;     
      when "01" => slv_ip2bus_data <= slv_reg1;     
      when others => slv_ip2bus_data <= (others => '0');   
   end case; 
end process SLAVE_REG_READ_PROC;

 

There could be some VHDL errors above.

 

 

 

 

Here is a example in Verilog that I was doing:

 

  // implement slave model register read mux
  always @( slv_reg_read_sel or slv_reg0 )
    begin: SLAVE_REG_READ_PROC

      case ( slv_reg_read_sel )
        1'b1 : slv_ip2bus_data <= { slv_reg0[0 : 29], rcv_prog_empty, rcv_fifo_full };  
        default : slv_ip2bus_data <= 0;
      endcase

    end // SLAVE_REG_READ_PROC

 

 

Message Edited by golson on 04-06-2009 12:12 PM
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Observer eugen86
Observer
10,090 Views
Registered: ‎04-06-2009

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

Jump to solution

Hi,

 

thank you for your fast respons!

 

Indeed the line you have changed is a better way to fulfill the slv_reg0 (      when "10" => slv_ip2bus_data <=slv_reg0(0 to 27) & DIP_Data; --slv_reg0;)

 

Unfortunately it does not solv my problem that the status of the LEDs is only read once a time after programming the board. If I change the DIP Switches, the LEDs dont change. 

 

Maybe this is the wrong position in the code to write the DIP status into the intern register ???

 

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Scholar golson
Scholar
10,066 Views
Registered: ‎04-07-2008

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

Jump to solution

if you don't need to have the microblaze read the dip switch data why  not try this:

 

LED_Data  <= DIP_Data;

 

 

instead of

LED_Data(0 to 3) <= slv_reg1(28 to 31);

 

 

inside the peripheral you created.

 

 

Message Edited by golson on 04-07-2009 07:29 AM
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Observer eugen86
Observer
10,049 Views
Registered: ‎04-06-2009

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

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yes this would work. But I want to "connect" the leds and dips with the C code.

 

The programm is just a kind of exercise programm for me to get it to work.

After this I want to write PCM Data into one register, do some audio processing with the C code and copy it back to the other register, which I would connect with the PCM out. So I need the microblaze read the data :(

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Scholar golson
Scholar
10,042 Views
Registered: ‎04-07-2008

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

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Have you looked at the driver directory.  There are example files and Inline macro code you can use in your C program.

 

for example in mine I have

 

* Write/Read 32 bit value to/from TX user logic slave registers.

*

* @param BaseAddress is the base address of the TX device.

* @param RegOffset is the offset from the slave register to write to or read from.

* @param Value is the data written to the register.

*

* @return Data is the data from the user logic slave register.

*

* @note

* C-style signature:

* void TX_mWriteSlaveRegn(Xuint32 BaseAddress, unsigned RegOffset, Xuint32 Value)

* Xuint32 TX_mReadSlaveRegn(Xuint32 BaseAddress, unsigned RegOffset)

*

*/

#define TX_mWriteSlaveReg0(BaseAddress, RegOffset, Value) \

XIo_Out32((BaseAddress) + (TX_SLV_REG0_OFFSET) + (RegOffset), (Xuint32)(Value))

#define TX_mReadSlaveReg0(BaseAddress, RegOffset) \

XIo_In32((BaseAddress) + (TX_SLV_REG0_OFFSET) + (RegOffset))

 

I only have one slave register and my peripheral was named TX.  But I have been able to use the function

for reading the data value and printing the value out.  There is also a selftest that has code in it

that probably exercises the slave registers.

 

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Observer eugen86
Observer
10,037 Views
Registered: ‎04-06-2009

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

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I already tried this methods. But, I am also able to write and read the registers by the C code while I use their hex adresses as in my code above. I know this for sure, because I have wrote data into the register memory which is referenced by the pointer and the LEDs have shined like the data I wrote into. 

My problem is that I am not able to write "hardware data" into the registers. Such data which comes from an external port like data from the Dips for example. I created external ports in my pheripheral for the DIPs, but I dont find a way to write this data into the slv_reg.

 

Message Edited by eugen86 on 04-07-2009 10:28 PM
 

except of my UCF File:

Net LED_Data_pin<0> LOC = AC4;
Net LED_Data_pin<0> IOSTANDARD=LVTTL;
Net LED_Data_pin<0> SLEW=SLOW;
Net LED_Data_pin<0> DRIVE=12;
Net LED_Data_pin<1> LOC = AC3;
Net LED_Data_pin<1> IOSTANDARD=LVT

.........

 
 
Message Edited by eugen86 on 04-07-2009 10:39 PM
Message Edited by eugen86 on 04-08-2009 04:15 PM
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Scholar golson
Scholar
10,031 Views
Registered: ‎04-07-2008

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

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I not sure what the problem is.  But I would try sending the input bits through through two sequential flip flops to retime the data.

 

If that does not help.  Then I would try using chipscope to view the output signals on the flip flops hooked in to see if the data

is on the output of them. 

 

study over your mhs file also to see if it agrees with the gui.

Message Edited by golson on 04-07-2009 03:15 PM
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Observer eugen86
Observer
13,005 Views
Registered: ‎04-06-2009

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

Jump to solution

Hi, I solved it !!!!!

 

The pointer in my C-Code had the wrong type. It must have been "Xuint32" not "int". I guess the program ran until the line

 

*reg1pointer =*reg0pointer;

 and the microblaze freezed or got an error or sth. at this line. Therefore only the status of the DIPs after programming was shown on the LEDs.

I changed my code and use the example functions which you suggested me to use.

 

Thank you very much for your support !!

 

One question is left: How can I check if the microblaze has an error with my code?. Do you know a tutorial which shows how to debug a microblaze system or how to read error messages out of it without the use of RS232. (I got a laptop without RS232 :(  )

 

 

Here my working C-Code:

 

 #include "xparameters.h"
#include "fpgadevtut2reg.h"

int main (void) {

while(1){
FPGADEVTUT2REG_mWriteSlaveReg1(XPAR_FPGADEVTUT2REG_0_BASEADDR,0,FPGADEVTUT2REG_mReadSlaveReg0(XPAR_FPGADEVTUT2REG_0_BASEADDR,0));
}
return 0;
}


 

 

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Xilinx Employee
Xilinx Employee
9,987 Views
Registered: ‎08-13-2007

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

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You may find this useful:

http://www.xilinx.com/support/documentation/application_notes/xapp1037.pdf (Introduction to Software Debugging on Xilinx MicroBlaze Embedded Platforms)

 

bt

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Newbie eyc
Newbie
2,989 Views
Registered: ‎06-29-2012

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

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i m new these thing and i have a problem about solution. if we change the user_logic.vhd like this and read slv_reg with software, could we read swithes?

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Xilinx Employee
Xilinx Employee
2,980 Views
Registered: ‎08-13-2007

Re: How can I write the status of the DIP-Switches into a Software Accessible Register

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Yes, you could make your own pcore to read DIP switch inputs - but why would you?

I suspect the AXI GPIO core (or the older xps_gpio [PLB v4.6], plb_gio {PLB v3.4] or opb_gpio for older systems) will do what almost all people would want here for simple switch inputs or "static" (e.g. LED) outputs

C:\Xilinx\14.1\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\axi_gpio_v1_01_b

C:\Xilinx\14.1\ISE_DS\EDK\sw\XilinxProcessorIPLib\drivers\gpio_v3_00_a

 

bt

 

 

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