01-15-2009 07:49 AM
Thanks in advance for any help!!!
2) connecting the opb_gpio directly to my VHDL block... but still, i don't have any clue on how to do it
1) create a VHDL block containing an instance of opb_gpio and my VHDL block (i don't know how to do it)
I have considered 2 solutions:
I can i realize it?
The schematic is something like this: MICROBLAZE<--->OPB_BUS<--->opb_gpio<---->My_VHDL_Block<--->External port
I need to make a connection between the output of IP opb_gpio (channel1) to a VHDL block that i have done. That block is then connected an external port.
Hello. I'm a beginner in EDK. I'm currently using XPS 8.2.
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01-19-2009 09:14 AM
You want to use gpio, but not to drive/read external pins, but to drive/read inputs/outputs of a standard vhdl block? Ok. Then you should be able to use opb_gpio unmodified.
You just need to wrap your vhdl module in a pcore.
Not an issue. Please follow these steps. (I'm following along in EDK 10.1, so it is possible the steps will be slightly different. )
At this point you should be able to find the new pmod in the IP catalog. Add it to the project, and connect it all up on the ports tab.
That should do it.
01-15-2009 09:54 AM
In EDK, go to Hardware-Create or Import Peripheral"
Choose create templates...
Give it a name, destination, etc.
When you get to the bus interface page, check the box near the bottom to "Enable OPB and PLB v3.4 bus interfaces", then choose OPB.
You'll have to choose what sort of interface bits and pieces you want, but when you're done, this will give you an interface framework that's not to difficult to understand.
Good luck.
01-19-2009 02:51 AM
Thanks for your reply.
I was wondering how can i realize my Own gpio on OPB bus without using the prebuilt Xilinx opb_gpio device (which i cannot modify to add my own VHDL block).
Could you help me again?
Thank you in advance!
Giacomo
01-19-2009 09:14 AM
You want to use gpio, but not to drive/read external pins, but to drive/read inputs/outputs of a standard vhdl block? Ok. Then you should be able to use opb_gpio unmodified.
You just need to wrap your vhdl module in a pcore.
Not an issue. Please follow these steps. (I'm following along in EDK 10.1, so it is possible the steps will be slightly different. )
At this point you should be able to find the new pmod in the IP catalog. Add it to the project, and connect it all up on the ports tab.
That should do it.
01-21-2009 03:09 AM
04-19-2009 08:07 PM
I did the similar flow for another ISE project which just counter X time clock and then flip the LED.
I can create the IP and see it in IP Catalog. However, I can not drag the IP to the bus interface. I also tried right click the IP and choose "ADD IP", still nothing happens.
Am I missing anything?
04-21-2009 05:14 PM
"I did the similar flow for another ISE project which just counter X time clock and then flip the LED.
I can create the IP and see it in IP Catalog. However, I can not drag the IP to the bus interface. I also tried right click the IP and choose "ADD IP", still nothing happens.
Am I missing anything?"
So I had the same issue today when trying to modify the existing tft controller ip that is provided by the xilinx EDK. I'm not 100% if this was the issue, but I had named my custom IP the same name as the Xilinx TFT IP, xps_tft, so maybe EDK got confused that there were two identically named IPs somewhere in the repositories. All I did was change the name of the top level module of my custom IP, and thus the name of the custom IP I imported, and that fixed the problem!
Hope this helps, let me know what happens!