10-09-2018 11:27 PM
1. I have emulated Tensilica DSP on Artix7 FPGA on Zedboard (xc7z020clg484). Now I need to access this DSP from a host for things like downloading applications, debugging etc.. One of the option I am trying is to map the JTAG pins to PMOD connector on the zed board. And then using TRACE32(Laughterbach) to access the DSP by hard-wiring PMOD mapped JTAG pins to Trace32 connector. Are there any better method to do this? I understand that there is no connectivity between Arm A9 on Zedboard to the emulated DSP, once we emulate DSP on FPGA using bit file.
2. I couldn't find a standard JTAG connector on Zedboard. The "XADC HEADER" connector on Zedboard looks like a standard JTAG connector where I can directly plug-in TRACe32. But "XADC HEADER" seems to have few analog pins and I don't think I can map JTAG signals to this connector in my bit file. Is this understanding correct?
10-15-2018 01:21 AM
1. I'm not sure but I think that you can use BSCAN2 primitive in your design so you can access to the JTAG pins internally in the design. This way you should be able to avoid external connections, so connecting the TRACE32 to the board JTAG pins should be enough.
2 The Zeboard hardware guide describes you how the JTAG connection is provided in the board, basically you have the Digilent USB-to-JTAG connector and then the classical Xilinx Platform Cable connector (J15). For trace32 you will need probably to build an adapter or wire from J15 to TRACE 32.
10-15-2018 03:22 AM
Thanks for your reply. Please refer to the emulation on zedboard attached. I am trying to solve the path marked in RED(in attached ppt).
From the below reply, I understand an external JTAG is needed to access the DSP emulated on FPGA. I was thinking if there is a way to access such emulated DSP using Vivado or similar in-expensive tool / method to program it with my application. Note that I am trying to program this emulated DSP using an .exe/bin/hex file and want to display results in console.
I do have "Xilinx HW-USB-II-G Programmer Platform Cable". But using this I can just program my bit file on FPGA. Is this cable not intended to debug such emulated DSP? Because I can't see any option to download a program or debug the DSP after the FPGA programm...
10-15-2018 03:41 AM
The Xilinx Platform cable is intended to be used to program the FPGA and also debug the cores within the device (either ARM in the PS or logical cores like Microblaze in the PL). The Microblaze core makes use of MDM IP to provide the debug interface, so for your DSP I was suggesting to use the BSCAN to connect the core to the JTAG chain. Once done you can test if it work just listing the available targets from Xilinx SDK or XSCT.
If the above flow works then you just need to figure out how you want to integrate that with your IDE/Debugger. I mean can lautherbach debug the DSP? Can Lauterbach use Xilinx Platform cable? If no you can use the Trace32 debugger connected to J15 connector.
10-16-2018 12:06 AM
Can you please let me know what is BSCAN? Is this an RTL code, where I can route JTAG signals to this? I could see a mention of this in https://www.xilinx.com/support/documentation/application_notes/xapp1084_tamp_resist_dsgns.pdf, and it is for virtex6. I am using Zedboard, which figures Virtex7.
10-18-2018 06:47 AM