03-24-2014 12:50 PM
I've seen a few posts about people having difficult importing an embedded design from planahead to vivado for zynq and importing custom IP form planahead to vivado. I was working with the IP Integrator and it looks to be impossibly inconvenient. So much so that I was convinced that I'm doing something wrong.
Do I really have to manually connect most of the pins in the blocks that IP Integrator generates? The Run Connection Automation barely helps. For example, I have an AXI DMA instanntiated and a processing system with a HP0 port active. It won't let me connect the HP0 to the M_AXI_MM2S port of the AXI DMA. It says "No matching connections found". In planahead, I never even worked with the schematic. I could simply use the "Bus Interfaces" tab to connect up what I wanted. I could also input text manually into the MHS files (I know this is against suggestions but it was so much easier).
Now there are a ton of ports on each block I don't care about that I have to sift through. Is there no interface like PlanAhead's XPS' Bus Interfaces tab?
05-14-2014 05:02 AM
Which version of Vivado are you using? Some masters, like DMA, must be interconnected to appropriate IP. To assist in
additional automation, specify more information, as follows:
° An additional parameter, DEPENDENT_ON, must be set on the address space. Set the
value should to the string name of the slave interface that creates the transaction.
This allows DMA-like masters to declare that master transactions are based upon a
° An additional parameter PREFERRED_USAGE on the address space indicates the
type of memory accessed. Possible values are: MEMORY, REGISTER, and ALL. DMAs
In addition, the automation features have been enhanced a lot in the latest version 2014.1.The recommend approach is to run the block automatic on IPs like MIG, DMA followed by connection automation. There is a good document to get started
Hope that helps.