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grando
Observer
Observer
9,665 Views
Registered: ‎09-15-2009

Initialization of LMB and XPS BRAM

Hi,

 

I have a project with 4 microblazes sharing a PLB, one xps_bram and one lmb_bram (only one processor has local memory, the others will later run from SDRAM).

The xps_bram is mapped to address 0x00000000 so that all processors start executing there.Then I create a small boot program in assembler which I want to place in this xps_bram.

Furthermore, there is a program (which I call Test) with which I want to initialize the lmb_bram (mapped to 0x10000000).

 

How do I initialize both BRAMs?

 

My first try was:

configue the linker script so that Boot is linked to xps_bram (0x00000000) and Test is linked to lmb_bram (0x10000000)

   Boot has neither std library nor vector section (it's purely my assembler code)

   Test has no vector section (I'm not using any interruption, so it should not be a problem now)

 

associate the Boot application to Microblaze_1 (xps_bram only)

associate the Test application to Microblaze_0 (lmb_bram and xps_bram)

 

When I download the bitstream, the Test program runs after a while as if there were no Boot program. I think the xps_bram is either not initialized with Boot or it's overwriten with the initialization associated with Microblaze_0.

I know it's a naive approach, but I'm not familiarized with data2mem, which I believe to be the correct solution.

 

Does anyone knows a reference design or how to do this?

 

Thanks in advance,

 

Carmela

 

 

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12 Replies
aminfar1
Explorer
Explorer
9,641 Views
Registered: ‎01-09-2009

What's the interface of your xps_bram to the processors? How do you share a BRAM between multiple processors? LMB is a single master bus!

I am not familiar with linker stuff, but I think you are doing something super strange that might not be feasible in reality :).

 

 

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grando
Observer
Observer
9,623 Views
Registered: ‎09-15-2009

Hi,

 

thanks for you attention.

 

There are two BRAM blocks:

- lmb_bram uses a LMB BRAM Controller and is connected to a single processor using a LMB.

- xps_bram uses XPS BRAM Controller and is connected to PLB, and so it can be shared by all processors connected to this bus.

 

So far, I can't say if it's feasible or not, but it demands some special attention, yes.

By now it would be helpfull to know how to correctly initialize the brams, since the "Mark to Initialize BRAMs" option in the XPS GUI doesn't seem to be the most suitable.



Carmela
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aminfar1
Explorer
Explorer
9,611 Views
Registered: ‎01-09-2009

As far as I understood, only one of your processors has a local memory (LMB_BRAM) and all of them get their instructions from a shared memory through PLB. I have never shared an instruction memory between multiple processors and I believe it is not a good idea at all (even if it is feasible). It really slows down your processors because of congestion to access a shared instruction memory.

 

I might be wrong. So get some help from other people to make sure what you are doing is right. I hope that a Xilinx guy can shed some light on this.

 

aminfar

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grando
Observer
Observer
9,582 Views
Registered: ‎09-15-2009

Hi aminfar,

 

I understand your point and agree with you considering a general application.

But the program supposed to be in the xps_bram is very small (less then 100 instructions).

 

It is like a small boot. Basicaly, it reads the USER1 field from PVR register (which I define differently for each processor) and jumps to another address accordingly.

 

Microblaze_0 should jump to its LMB_BRAM address and run from there (an application that loads programs into the SDRAM)

The other processors should  jump to SDRAM and run from there. The address where they jump to is obtained using USER1 field, so it's different for each one.

The data is manipulated using registers, so it stays local for each processor. The very few data in memory are also addressed according to the USER1 value, so trey're not overwritten.

 

So, theoreticaly there should be no data conflicts, and since the program is small and doesn't occur often, the speed drecrease at this point is not a problem.

Or, at least, if I can ensure that both BRAMs are initialized, then I can better evaluate the other issues.

 

Tanks for your considerations,

 

Carmela

 

 

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grando
Observer
Observer
9,553 Views
Registered: ‎09-15-2009

Hi,

 

what if the following new situations are considered:

 

1)

a system with one microblaze, one BRAM block connected to the processor via LMB, one BRAM block connected to the PLB. Two independent applications to be initialized, each in one memory block.

 

How do I initialize the LMB BRAM with one application and the PLB BRAM with the other?

 

2)

a system with two microblazes, two LMB BRAM (one for each processor), one BRAM connected to the PLB. Three independent programs to be initialized, each in one memory.

 

How do I initialize each memory? Is there anything that could cause the PLB BRAM to be overwritten or not initialized at all?

 

 

Thanks,

Carmela

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aminfar1
Explorer
Explorer
9,539 Views
Registered: ‎01-09-2009

you raised an interesting question. I think you know that you are able to put sections of your program, for example heap and stack, on the LMB BRAM and other sections on the PLB BRAM. But I don't know how to have two or three separate programs each on a separate BRAM. I would like to know the solution. I would recommend that you make a new thread with a new title. It might help.

 

Sorry that I could not help much. Hope you find your answer soon.

aminfar

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aminfar1
Explorer
Explorer
9,535 Views
Registered: ‎01-09-2009

Carmela,

 

I came across this thread that might be your solution. You can use this trick to put different functions in separate sections.

 

http://forums.xilinx.com/xlnx/board/message?board.id=EDK&thread.id=13801

 

aminfar

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grando
Observer
Observer
9,482 Views
Registered: ‎09-15-2009

Hi aminfar,

 

I'll try your suggestions and keep searching. I let yu know if I find any solution.

 

Thank you for you hints and attention

Carmela

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xiaofeip_dup
Xilinx Employee
Xilinx Employee
9,479 Views
Registered: ‎08-07-2007

Hi Carmela,

 

Address 0x0 is the reset vector for Microblaze. In another word, both microblaze_0 and microblaze_1 use 0x0 as a reset vector.

 

In liker script for both applicaitons (boot and test), address 0x0 is assignedas reset vector for each microblaze. Which means one will override another.

 

-Felix

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grando
Observer
Observer
3,716 Views
Registered: ‎09-15-2009

Hi Felix,

 

Thanks for your reply.

I'm aware about this issue, so that when I generated the linker script, I assigned different memory spaces for each program. I also used "-xl-mode-novectors" in the compiler option for both. (possibly not a good solution, but it was a try).

 

Now I made a small test: I deleted the  "-xl-mode-novectors" option, so the .vectors section is kept. Then, for the Test application, I manually changed the script, assigning the .vectors section to the beginning of the memory space in which I want to store this application (0x10000000).

 

It has no effect: it still behaves as if the Boot program was not there at all and the processor keep fetching instructions untill it reaches address 0x10000000, when it then executes the Test program.

 

Any idea?

 

Thanks,

Carmela

 

PS: idea about the two points I mentioned 2 posts before?

 

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xiaofeip_dup
Xilinx Employee
Xilinx Employee
3,714 Views
Registered: ‎08-07-2007

Carmela,

 

If you suspect that the XPS BRAMs are not initialized, you can verify it by reading out the data  with XMD. Use mrd command.

 

-Felix

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xiaofeip_dup
Xilinx Employee
Xilinx Employee
3,713 Views
Registered: ‎08-07-2007


grando wrote:

Hi,

 

what if the following new situations are considered:

 

1)

a system with one microblaze, one BRAM block connected to the processor via LMB, one BRAM block connected to the PLB. Two independent applications to be initialized, each in one memory block.

 

How do I initialize the LMB BRAM with one application and the PLB BRAM with the other?

 

2)

a system with two microblazes, two LMB BRAM (one for each processor), one BRAM connected to the PLB. Three independent programs to be initialized, each in one memory.

 

How do I initialize each memory? Is there anything that could cause the PLB BRAM to be overwritten or not initialized at all?

 

 

Thanks,

Carmela


Regarding your two points:

1. Only one application can be initialized into BRAMs for one processor. 

2. As above, only two applicaitons (one for each processor) can be initialized into BRAMs. This should be handled automatically by EDK. Otherwise, it's either you did something wrong or a bug of the tool.

 

-Felix

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