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Visitor santilzter
Visitor
644 Views
Registered: ‎10-20-2017

Inter-processor software interrupts

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Hello everyone,

 

I am trying to make interruptions between two different processors work in the Ultrascale+. I have modified the examples (xscugic_example.c) of Xilinx, but it does not work. I attach the code of the two main files, to see if anyone knows where the error may be. The processor that receives the interruption is A53_0 and the one that sends it is R5_0. I have read that the APU and the RPU have different and independent GICs (does this mean that they can not be interrupted between them?), but it still does not work if I try it with two processors of the APU.

 

Greetings and thanks in advance.

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Visitor santilzter
Visitor
915 Views
Registered: ‎10-20-2017

Re: Inter-processor software interrupts

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In case someone is having the same problem, I was looking in the wrong source. Now I'm on the right track: the library that needs to be used is xipipsu. There are examples in the folder Xilinx\SDK\version\data\embeddedsw\XilinxProcessorIPLib\drivers\ipipsu_v2_3.

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Visitor santilzter
Visitor
916 Views
Registered: ‎10-20-2017

Re: Inter-processor software interrupts

Jump to solution

In case someone is having the same problem, I was looking in the wrong source. Now I'm on the right track: the library that needs to be used is xipipsu. There are examples in the folder Xilinx\SDK\version\data\embeddedsw\XilinxProcessorIPLib\drivers\ipipsu_v2_3.

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