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Visitor
Visitor
4,702 Views
Registered: ‎02-08-2017

Launching of system debugger in 2016.4

Hi,

I am working on Zynq ultrascale (ZCU102) board. I had recently updated vivado from 2016.2 to 2016.4.

In SDK, I am able to program FPGA but when I tried to debug using system debugger, It stuck  at 77%.

After waiting I turn off the board  then it was showing a "memory read error".

Please find attached image.

 

Thank you. 

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Error_LaunchingSysDeg.PNG
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6 Replies
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Xilinx Employee
Xilinx Employee
4,687 Views
Registered: ‎01-03-2017

Re: Launching of system debugger in 2016.4

Hi,

 

Restart the board and try downloading the application 

On which processor you are running the application?

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Xilinx Employee
Xilinx Employee
4,685 Views
Registered: ‎10-21-2010

Re: Launching of system debugger in 2016.4

Hi,

Can you enable debug messages in SDK log and check which command it's running when it's stuck (Window -> Preferences -> Xilinx SDK -> Log Information Level). I guess it's polling for the PLLs to be locked during psu_init. If you don't see this problem with 2016.2, can you compare psu_init.tcl files in 2016.2 and 2016.4

 

The invalid ACK error when you power off the board is expected, since the debugger has lost access to ARM DAP and has received invalid data on Jtag

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Visitor
Visitor
4,663 Views
Registered: ‎02-08-2017

Re: Launching of system debugger in 2016.4

Hi,

 

I enabled the debug mode of SDK log.

After launching on system debugger, this was the last line on SDK log: "DEBUG : XSCT Command: [psu_init], Thread: Worker-2"

 

Now I have don't have licence for vivado 2016.2 but I will check on that soon.

 

Thank you. 

 

 

 

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Visitor
Visitor
4,658 Views
Registered: ‎02-08-2017

Re: Launching of system debugger in 2016.4

Hi, 

I am using psu_cortexa53_0.

I have tried it but still facing that issue.

 

Thank you. 

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Xilinx Employee
Xilinx Employee
4,657 Views
Registered: ‎08-01-2008

Re: Launching of system debugger in 2016.4

you can try again after power cycle .

I have seen one related post it may help you

https://forums.xilinx.com/t5/Embedded-Processor-System-Design/QSPI-Flash-upgrade-after-Secure-Boot/td-p/362915
Thanks and Regards
Balkrishan
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Visitor
Visitor
4,530 Views
Registered: ‎02-08-2017

Re: Launching of system debugger in 2016.4

Hi,

I have checked the same code on vivado 2016.2.

Now it is giving error as "can not halt processor core "

I am using USB JTAG port for programming FPGA.

 

Thank you.

 

core timeout.png
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