02-08-2017 10:55 PM
I am working on Zynq ultrascale (ZCU102) board. I had recently updated vivado from 2016.2 to 2016.4.
In SDK, I am able to program FPGA but when I tried to debug using system debugger, It stuck at 77%.
After waiting I turn off the board then it was showing a "memory read error".
Please find attached image.
02-09-2017 12:06 AM
Can you enable debug messages in SDK log and check which command it's running when it's stuck (Window -> Preferences -> Xilinx SDK -> Log Information Level). I guess it's polling for the PLLs to be locked during psu_init. If you don't see this problem with 2016.2, can you compare psu_init.tcl files in 2016.2 and 2016.4
The invalid ACK error when you power off the board is expected, since the debugger has lost access to ARM DAP and has received invalid data on Jtag
02-09-2017 12:45 AM
I enabled the debug mode of SDK log.
After launching on system debugger, this was the last line on SDK log: "DEBUG : XSCT Command: [psu_init], Thread: Worker-2"
Now I have don't have licence for vivado 2016.2 but I will check on that soon.
02-09-2017 12:51 AM
02-14-2017 10:19 PM
I have checked the same code on vivado 2016.2.
Now it is giving error as "can not halt processor core "
I am using USB JTAG port for programming FPGA.