11-18-2009 11:51 AM
I am attempting to use the MPMC to communicate with some DDR2. I am using a development board from PLDA that uses a Virtex-5 FX200T. The on-board DDR2 I am trying to talk to is a single bank comprised of two discrete ICs for a total of 64Mx32.
To test the memory, I am using a simple app to write a constant value across a range of memory locations, and then I am reading the contents of those memory locations back to check and see if the values are correct. What I am observing is that when I write a value across a range and then read that same range back, some locations have the correct value, and some don't. When I repeat the write again using the same value, now all the memory locations have the correct value. I have to make two passes of writes across the memory range to have all the memory locations show the correct value.
As a side note, I previously have implemented a PPC440_DDR2 memory controller on this same board and was able to get that to work successfully. So I am pretty sure there is nothing wrong with the memory, my pin locations, etc. I am guessing there is some sort of timing error somewhere. Any ideas?
11-18-2009 01:15 PM
limited knowledge here, but I thought there was a memory test built into the MPMC environment,
what version of MPMC have you got ? I know they are changing over time and getting a lot better.
BTW: Writing the same to multiple locations is not in general a good test, address could be broken and it would still pass.
so the fact your getting the correct answer after second write could be a red herring.
DDR2 is a Sh1t to work with, so many things are on the limit, that it only takes somehting like a DLL / PLL to be connected different in the FPGA to the app note, for it not to work reliably.
11-18-2009 04:35 PM
I am using MPMC 4.03.a.
Yes, I am also using the MPMC memory test app that is generated by Platform Studio. It also indicates errors. The purpose of my app was to do a simpler test where I had full control of what was being written and read where, and that could be run quickly for quick checks.
I should also point out that I am attempting to use the PPC440MC interface of the MPMC. An interesting bit of info...when I use the PLB interface on the MPMC to read and write to memory, it works perfectly fine. But the PPC440MC interface exhibits the errors I described in my original post. Has anyone encountered something similar?
11-24-2009 08:03 AM
Remember to change the C_PPC440MC_CONTROL parameter when changing from ppc440mc_ddr2 core to MPMC. I would suggest also using the memory test from the mpmc driver's examples directory, especially for validating when the fix is found.
Also what memory width are you using
If you have a support case open, feel free to message the number to me directly.