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Participant
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Registered: ‎11-06-2019

Methods to offload some part of logic from PL to PS in Ultrascale+ device

Hi.

I want to know how can I offload some part of my RTL code and logics in PL to PS section?

1. Is there any limitation in doing so. if yes whats that?

2. What all things we can do with ARM core of Ultrascale+ device?

3. Can we directly access and use the arm core in Ultrascale+ device without using PL?

4. Are there any dedicated pins to use ARM core of the device?

5. If we use IP like, DMAC, AXI, DDR, I2C, SPI etc., It comes in PS or PL?

 

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