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BZab
Observer
Observer
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Registered: ‎10-06-2020

Microblaze - how to execute .bin from DDR on ZYNQ

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Hi,

I'm trying to run Hello World from binary placed in DDR on Microblaze, on board with ZYNQ 7020. (I want to be able to dynamically place binary with application to execute on Microblaze, under control of petalinux running on ARM).

Microblaze's base address is 0x1010_0000, connects to ZYNQ with data/instruction caches connected to HP0 and reset mode is configured to 01 like in 'Execute from DDR tutorial', kernel's RAM is limited to 256MB using bootargs. Petalinux is built following the process described in UG980. I've built Hello World in SDK and used mb-objcopy -O binary to convert elf into binary.

Petalinux:

  • writes 0x01f3_3f0f to 0xf800_0240 to switch on the reset,
  • copies binary with application to ddr (starting from microblaze's reset vector - 0x1010_0000),
  • writes zero to 0x01f3_3f0f to switch the reset off,
  • writes '1' to LSBs at 0xf8008014 and 0xf8008000 tu configure AXI in 32b mode,
  • finally sets gpios 960 and 961 high, to wake the Microblaze up.

 

After waking up Microblaze requests burst reads of 8 words from addresses: 0x1010_0000, _0020 and _0040 and after receiving like 3 words seems to reset and request reads again, incrementing only first address by 4 (so in second iteration it requests from _0004, _0020, _0040). It repeats over and over again until it reaches point when Microblaze would request reads starting from _0020, when it totally freezes. Using ILA I can see that data sent to Microblaze during reads is correct.

Is there any way to access Microblaze's MSR from ARM or using Vivado / SDK etc tools? What I should do to be able to dynamically load application form ddr and execute it on Microblaze?

EDIT: I've edited init_platform() function, so before enabling caches I'm trying (because MB resets earlier) to invalidate them like here: https://forums.xilinx.com/t5/Embedded-Development-Tools/Microblaze-Do-we-really-need-to-Invalidate-the-Caches-before/td-p/280944. Now Microblaze resets after finishing initial reads from ddr (3 bursts of 8x32b). Now all read addresses increase by 20, each 8 iterations, so I guess PC still increments by 4 with each iteration.

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BZab
Observer
Observer
316 Views
Registered: ‎10-06-2020

The problem was... The endianness.

After converting .elf to .bin with mb-objcopy, output file had wrong endianness.

After swapping it with mb-objcopy -I binary -O binary --reverse-bytes=4 inputfile.bin outputfile.bin Microblaze was able to load and execute the code.

 

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BZab
Observer
Observer
369 Views
Registered: ‎10-06-2020

I have tried to run it using debugger in SDK connected to HW.

First instruction gets executed (0x1010_0000: imm 4112). Then PC sets to 0x1010_0004, R18 stays 0! (while should be modified by imm) and ESR gets set to 0x804 (unaligned word access exception).

When it tries to execute second instruction - 0x10100_0004: brai 80, it jumps to 0x0000_0050 instead of 0x1010_0050, and then goes wild.

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BZab
Observer
Observer
317 Views
Registered: ‎10-06-2020

The problem was... The endianness.

After converting .elf to .bin with mb-objcopy, output file had wrong endianness.

After swapping it with mb-objcopy -I binary -O binary --reverse-bytes=4 inputfile.bin outputfile.bin Microblaze was able to load and execute the code.

 

View solution in original post