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andyk
Visitor
Visitor
483 Views
Registered: ‎07-15-2019

Migration from SDK to Vitis xilskey_epl.h not found

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I am trying to move a project over from SDK 2018.3 to Vitis 2020.2 and I am hitting an issue with on include xilskey_epl.h.  It can not find one of xilskey headers.. It does appear to find others though
:/Users/XxxxxXxxxsx/Work/ProjectA-hw/fw/src/gateway_common/GwMzM2EfuseMgr.H:31:10: fatal error: xilskey_epl.h: No such file or directory
31 | #include "xilskey_epl.h"
| ^~~~~~~~~~~~~~~

Note: My source files were included in the Application as Link
(Import sources / Create top-level  folder/Create links in workspace/Create virtual folders) Not sure if this was the correct/best way

Did some looking and the  .h file in question was in SDK 2018.3, library xilskey version 6.6
bsrc/xilskey_v6_6/src/include
$ ls
xilskey_bbram.h xilskey_eps.h xilskey_eps_zynqmp_puf.h
xilskey_epl.h xilskey_eps_zynqmp.h xilskey_utils.h

But it is not in the Vitis 2020.2 version of the library xilskey 7.0

/libsrc/xilskey_v7_0/src/include (kulich/playground)
$ ls
xilskey_bbram.h xilskey_eps_zynqmp.h xilskey_eps_zynqmp_puf.h xilskey_utils.h

I can not find the documentation the refers to what the migration should be.

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longley
Xilinx Employee
Xilinx Employee
375 Views
Registered: ‎04-15-2011

@andyk 

To migrate a SDK project to Vitis software platform, you can refer to page169 of UG1400(v2020.2).

And I would suggest you update your applications based on latest library (ie xilskey v7.0 in your case) if you decide to upgrade your design from 2018.3 to 2020.2.

If you would like ot keep using xilskey v6.6, you can modify the parameter in xilskey of mss file in your Vitis domain.

BEGIN LIBRARY
PARAMETER LIBRARY_NAME = xilskey
PARAMETER LIBRARY_VER = 6.6
PARAMETER PROC_INSTANCE = psu_cortexa53_0
END

Then load the bsp setting from this mss file, and re-build everything. Then you should be able to see the xilskey_epl.h file.

longley_0-1614152786436.png

 

Thanks,

Longley


------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub and our
Versal Blogs

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View solution in original post

1 Reply
longley
Xilinx Employee
Xilinx Employee
376 Views
Registered: ‎04-15-2011

@andyk 

To migrate a SDK project to Vitis software platform, you can refer to page169 of UG1400(v2020.2).

And I would suggest you update your applications based on latest library (ie xilskey v7.0 in your case) if you decide to upgrade your design from 2018.3 to 2020.2.

If you would like ot keep using xilskey v6.6, you can modify the parameter in xilskey of mss file in your Vitis domain.

BEGIN LIBRARY
PARAMETER LIBRARY_NAME = xilskey
PARAMETER LIBRARY_VER = 6.6
PARAMETER PROC_INSTANCE = psu_cortexa53_0
END

Then load the bsp setting from this mss file, and re-build everything. Then you should be able to see the xilskey_epl.h file.

longley_0-1614152786436.png

 

Thanks,

Longley


------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------

View solution in original post