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Mentor
Mentor
3,006 Views
Registered: ‎06-09-2011

Modelsim simulation problem

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Hi all,
I have a custom board -XC3S700A FPGA- with lots of peripherals and memories like parallel SRAM.
I have developped a simple EDK application to test my memory - I've connected the Async memory to Microblaze using xps_mch_emc.
I print 'X' character at the end of writing loop and 'E' whenever I read a wrong value - which you see my simple code below.
I see the 'X' and 'E' characters but I don't see controlling signals of memory -Address, data,...- in simulation?!.
I would appreciate any help on this issue. I should add that I am using XIo_Out32 and XIo_In8 memory write and read operations.

 

#define			High_Address_Limit		0xFF
#define			Write_SRAM				XIo_Out32
#define			Read_SRAM				XIo_In8

int main (void) {
   #if XPAR_MICROBLAZE_0_USE_ICACHE
      Xil_ICacheInvalidate();
      Xil_ICacheEnable();
   #endif

   #if XPAR_MICROBLAZE_0_USE_DCACHE
      Xil_DCacheInvalidate();
       Xil_DCacheEnable();
   #endif

Xuint32 i;
Xuint32 Address;
	i = 0;
	for (Address=0x00;Address <= (High_Address_Limit);Address++)
	{
		Write_SRAM((Xuint32*)Address,i);
		i++;
		if (i==0xff)
			print("X");
	}
	i = 0;
	for (Address=0x00;Address <= (High_Address_Limit);Address++)
	{
		if ((Read_SRAM((Xuint32*)Address) & 0xFF)!= i)
		{
			print("E");
		}
		i++;
	}
while(1);
   #if XPAR_MICROBLAZE_0_USE_DCACHE
      Xil_DCacheDisable();
      Xil_DCacheInvalidate();
   #endif

   #if XPAR_MICROBLAZE_0_USE_ICACHE
      Xil_ICacheDisable();
      Xil_ICacheInvalidate();
   #endif
   return 0;
}

 

Thanks in advance,
Hossein

Thanks,
Hossein
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1 Solution

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Highlighted
Mentor
Mentor
3,787 Views
Registered: ‎06-09-2011

Re: Modelsim simulation problem

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Hi,

 

Yes, in the write cycle I used a file and wrote the numbers in it. Then I read that file and put it on MEM_DQ in the read cycle.

The problem was really related to wrong Address range I had used in my code?!..

I have used EMC address in the 0x80180000-0x801fffff range, while you see I was addressing elsewhere!. Very funny?!.. Isn't it?!..

I saw all controlling signals after adding the base_address to the write and read functions.

 

Thank you for your attention.

Hossein

Thanks,
Hossein

View solution in original post

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2 Replies
Xilinx Employee
Xilinx Employee
2,988 Views
Registered: ‎08-02-2007

Re: Modelsim simulation problem

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Hi

 

Do you have memory model of SRAM included as a part of testbench?

 

--HS

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Highlighted
Mentor
Mentor
3,788 Views
Registered: ‎06-09-2011

Re: Modelsim simulation problem

Jump to solution

Hi,

 

Yes, in the write cycle I used a file and wrote the numbers in it. Then I read that file and put it on MEM_DQ in the read cycle.

The problem was really related to wrong Address range I had used in my code?!..

I have used EMC address in the 0x80180000-0x801fffff range, while you see I was addressing elsewhere!. Very funny?!.. Isn't it?!..

I saw all controlling signals after adding the base_address to the write and read functions.

 

Thank you for your attention.

Hossein

Thanks,
Hossein

View solution in original post

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