02-26-2021 12:52 AM
Hello,
Im working with:
- Xilinx SDK 2018.3
- Avnet Ultra96 (Xilinx UltraScale+ MPSoC ZU3EG)
I'm writing an application and want all 4 Cortex-A53 to execute (nearly) the same code. First, core 0 starts and initializes the other three cores. However, debugging with the Xilinx System Debugger seems a bit complicated, as I can only select the .elf file for core 0. When I switch to the other three cores, the debug information is not available.
Is there a way to use the same .elf file in one debug session for all 4 Cortex-A53 cores?
Or is even executing the same code by multiple cores a bad idea due to some hardware restrictions I'm not aware of?
Best regards,
Michael
02-27-2021 03:39 PM
@Michael_M0 , in the debug, right click on the core you want to load the symbols and you will see you can load the symbols - it's your elf file.
If the L1 caches are set for SMP and the MMU of all cores map the same memory you will be OK..
02-27-2021 03:39 PM
@Michael_M0 , in the debug, right click on the core you want to load the symbols and you will see you can load the symbols - it's your elf file.
If the L1 caches are set for SMP and the MMU of all cores map the same memory you will be OK..
03-01-2021 12:47 AM - edited 03-01-2021 01:10 AM
Hi @ericv ,
Thanks, it worked. But I've expected such a setting in the debugger settings. (edit: It is contained in the debugger settings. How could miss this? my fail.)
Also, I need to take a look if and where this setting is saved, so that it doesn't get lost when I save the project or pass it to someone else.
Thanks so far.
Regards,
Michael