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Explorer
Explorer
3,840 Views
Registered: ‎08-16-2008

NPI port width

Hello! I use mpmc v6.02 with SD SDRAM (32-bit). Can I use 32 bit data width NPI port? In mpmc,pdf in restriction section (page 185) sad that if npi is 32 bit - sdram should be 64 bit. Is it mandatory? So how 32 bit XCL works(it also use NPI port)?

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4 Replies
Xilinx Employee
Xilinx Employee
3,836 Views
Registered: ‎07-30-2007

Re: NPI port width

I do not seen any requirements like that on page 185.  The restrictions on that page only describe how the NPI signaling reacts under certain width combinations.

 

I hope this helps,

Dylan

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Explorer
Explorer
3,820 Views
Registered: ‎08-16-2008

Re: NPI port width

good operation and faultHi! I have implemented 32 bit NPI module. I can read/write data to sdram with no errors, but sometimes there are faults. I don't know what happens. My FSM from NPI side can't assign such signals (at least in simulation). I wonder that NPI outputs also takes very strange values during this fault. What may be wrong? P.S. I use 32 bit sdram. MPMC_Clk0, PLB Ccock , my npi module clock = 100Mhz from the same DCM. I use 4 NPI ports simultaneously

 

debug.png

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Xilinx Employee
Xilinx Employee
3,813 Views
Registered: ‎07-30-2007

Re: NPI port width

Your init_done is going low, which indicates a reset of some type.  This could come from your MMCM//PLLs losing lock, IDELAYS coming not ready or external reset.

 

Dylan

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Explorer
Explorer
3,804 Views
Registered: ‎08-16-2008

Re: NPI port width

Yes, my PLL losing lock.

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