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Participant
Participant
6,738 Views
Registered: ‎09-14-2010

No joy doing JTAG debugging on ZC702 in SDK.

Hey all. I am trying to compile a standalone executable for the ZC702 that can read some stuff off the SD card (so I can later do this for our own zynq card, which can't do this yet), based on hello world, but I'm stuck at run-time. I have got it to work exactly once, but I cannot reproduce what I did right that time. There are several inscutible errors, but this one is the most common;

 

"Unexpected error while launching program; Error while running ps7_init method."

 

I interpret this to mean that for some reason the system can't run the script defined in  ps7_init.tcl, which is a part of the hardware platform generated in planAhead or EDK (being a software guy, I don't know/care which).

 

I've tried regenerating everything from the 702 defaults in planAhead, following lab #1 instructions from the Xilinx boot camp. I've tried booting the tools from a prompt with elevated permissions. I've tried restarting the machine.I've tried a bunch of other stuff that, in retrospect, seem to have nothing to do with the systems inability to run this script file. I don't know what else to try (except to just dump all this on a co-worker's desk).

 

We have to ship the 702 back to San Jose tomorrow, so post your best guess so I can try it before we box it up. We can still try it on our own board after that, but it's still got some hardware issues, which will cloud the matter.

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Participant
Participant
6,736 Views
Registered: ‎09-14-2010

burrowing into the .tcl file, I find that the error changes to a different .tcl file (I presume) if I tear out all the functionality. Adding it back in little by little, the error only returns into this .tcl file if I have a line not-commented referencing a call to "mwr" or "mrd". Memory write and memory read, I presume. Does anyone know where I can get these, and why it isn't included like it should be?
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Registered: ‎10-02-2012

I had the same error, 

 i solved the problem closing cable in Chip Scope pro. check if other program is using JTAG. 

hope it helps.

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Newbie
Newbie
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Registered: ‎02-13-2013

I have the same problem,  I either have to power cycle and reprogram the board or close the whole program to get it resolved.  Also I couldn't use my platform 2 usb jtag, it would never init with that one.

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Participant
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Registered: ‎04-02-2013

I am having the same problem with ZC706. It happens in one of my projects. I did some updates in the XPS, regenerated the whole project, exported to SDK, created "Hello World" application, successfully loaded the FPGA image and verified that it was working, however I got this error when loading the application to the CPU. I also noticed that the linker script does not get updated when rewriting the SDK export from PlanAhead.

 

Removing ChipScope and other JTAG communication hepled in the previous cases of the project where I had this problem randomly, but now it does not.

 

Thank you

 

Ondrej
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Participant
Participant
6,003 Views
Registered: ‎04-02-2013

When I use the XMD console to launch the ps7_init function, it returns that it cannot write to target.

 

After a successful FPGA configuration, I followed:

 

XMD% connect arm hw

JTAG chain configuration
--------------------------------------------------
Device ID Code IR Length Part Name
1 4ba00477 4 Cortex-A9
2 03731093 6 XC7Z045

CortexA9 Processor Configuration
-------------------------------------
Version.............................0x00000003
User ID.............................0x00000000
No of PC Breakpoints................6
No of Addr/Data Watchpoints.........1

XMD% cd workspace/v3ctor/v3ctor.sdk/SDK/SDK_Export/system_hw_platform/src

XMD% source ps7_init.tcl

XMD% ps7_init
ERROR: Cannot write to target

 

 

 

Ondrej
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Registered: ‎04-02-2013

I managed to fix it. I had an improper assignment of the address range for the AXI4-Lite IPIF (C_ARD_ADDR_RANGE_ARRAY). I am not sure, but impression is that this component was held in slave error on the AXI bus preventing the CPU from accessing any memory location.

 

This time, I connected AXI Master Lite interface to S_AXI_HP0 port for address range 0x20000000-0x2FFFFFFF and to my IP (through another AXI Interconnect). I am having the same error in the SDK again. I guess I am doing something wrong, but is there any how I can find out what!?

 

I also put additional ChipScope monitor on the component connected to S_AXI_HP0, however, I cannot capture any signals on there, but I can capture on the other AXI bus within the same design. 

 

Should the procedure be to run HDL of BFM simulations beforehand of the system architecture? I doubt DRC is capable enough to discover these potential problems. It really takes a lot of time, many iterations, thinking...

 

Thank you!   

Ondrej
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