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mrh973
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Registered: ‎02-06-2019

No serial output over USB-UART when testing the Hello World example

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I'm not getting any serial output over USB-UART when testing the Hello World example in Xilinx SDK. I've tried three different terminal clients without any output, and no errors either.

I have a custom Kintex-7 board, below is my design in Vivado. Screenshot from 2019-02-12 20-45-29.png

 I have added a UART Lite IP at 9600 BAUD as seen below:

Screenshot from 2019-02-12 20-49-10.png

Screenshot from 2019-02-12 21-48-17.png

Screenshot from 2019-02-12 21-50-21.png

Since I don't have board configuration file for my custom board, I've manually added the following contraints in Vivado. All VCCO pipelines are 3.3V: 

###########################
#### Clock pin mapping ####
###########################

# AC27 is the onboard 100MHz pin CLK
set_property PACKAGE_PIN AC27 [get_ports clk_100MHz]
# Add CLOCK_DEDICATED_ROUTE constraints
#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {clk_100MHz_IBUF}]

# PIN=T21,NAME=IO_L16N_T2_A15_D31_14,MBG=2,BANK=14,IO_TYPE=HR
set_property PACKAGE_PIN T21 [get_ports reset_rtl_0_0]

##############################
#### USB-UART pin mapping ####
##############################

set_property PACKAGE_PIN R24 [get_ports uart_rtl_0_rxd]
set_property PACKAGE_PIN AC22 [get_ports uart_rtl_0_txd]

#########################
#### i2c pin mapping ####
#########################

# Bank 13
set_property PACKAGE_PIN Y26 [get_ports IIC_0_scl_io]
set_property PACKAGE_PIN Y25 [get_ports IIC_0_sda_io]

set_property IOSTANDARD LVCMOS33 [get_ports clk_100MHz]

# Bank 14, VCCO_14, 3.3v
set_property IOSTANDARD LVCMOS33 [get_ports reset_rtl_0_0]

##set_property IOSTANDARD LVCMOS33 [get_ports ext_spi_clk]

# Bank 13, HR, 3.3v
set_property IOSTANDARD LVCMOS33 [get_ports IIC_0_scl_io]
set_property IOSTANDARD LVCMOS33 [get_ports IIC_0_sda_io]

###############################
#### USB-UART pin voltages ####
###############################

set_property IOSTANDARD LVCMOS33 [get_ports uart_rtl_0_rxd]
set_property IOSTANDARD LVCMOS33 [get_ports uart_rtl_0_txd]

# Clock Constraints
#create_clock -period 10.000 -name axi_clk [get_ports clk_100MHz]

I've succesfully generated a bitstream in Vivado, exported it, and launched Xilinx SDK from Vivado. Once Xilinx SDK started, I've created a new Application project using the C "Hello World" template.

#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"

int main()
{
    init_platform();
    print("Hello World\n\r");
    cleanup_platform();
    return 0;
}

The UARTLite shows up in the HW specification in the Xilinx SDK, and I've set stdout to the UART in the BSP's settings in the Xilinx SDK:

Screenshot from 2019-02-12 21-09-35.png

I'm using Ubuntu, and I'm able to connect  to /dev/ttyUSB0 from Xilinx SDK's using 9600 BAUD to match my UART settings in the hardware:

Screenshot from 2019-02-12 21-00-33.png

Putty config:

Screenshot from 2019-02-12 21-21-56.png

I've given all users read and write access rights to /dev/ttyUSB0:

$ ls -la /dev/ttyUSB0 
crw-rw-rw- 1 root dialout 188, 0 Nov 12 19:55 /dev/ttyUSB0

I have tried Run & Debug on hardware where I selected my own hardware:

Screenshot from 2019-02-12 21-03-41.png

 There are no errors, a far as I can see, I can also debug break in the code:

20:33:29 INFO	: Disconnected from the channel tcfchan#2.
20:34:13 INFO	: Connected to target on host '127.0.0.1' and port '3121'.
20:34:13 INFO	: 'targets -set -filter {jtag_cable_name =~ "Digilent JTAG-HS3 1312312131233" && level==0} -index 0' command is executed.
20:34:24 INFO	: FPGA configured successfully with bitstream "/home/xxx/xxx/xxx.sdk/mb_subsystem_wrapper_hw_platform_0/download.bit"
20:34:46 INFO	: Connected to target on host '127.0.0.1' and port '3121'.
20:35:35 INFO	: Connected to target on host '127.0.0.1' and port '3121'.
20:35:36 INFO	: Jtag cable 'Digilent JTAG-HS3 1312312131233' is selected.
20:35:36 INFO	: 'jtag frequency' command is executed.
20:35:36 INFO	: 'targets -set -filter {jtag_cable_name =~ "Digilent JTAG-HS3 1312312131233" && level==0} -index 0' command is executed.
20:35:46 INFO	: FPGA configured successfully with bitstream "/home/xxx/xxx/xxx.sdk/mb_subsystem_wrapper_hw_platform_0/mb_subsystem_wrapper.bit"
20:35:47 INFO	: 'configparams mdm-detect-bscan-mask 2' command is executed.
20:35:47 INFO	: Context for processor 'microblaze_0' is selected.
20:35:47 INFO	: Processor reset is completed for 'microblaze_0'.
20:35:47 INFO	: Context for processor 'microblaze_0' is selected.
20:35:47 INFO	: The application '/home/xxx/xxx/xxx.sdk/HelloWorld/Debug/HelloWorld.elf' is downloaded to processor 'microblaze_0'.
20:35:47 INFO	: ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
targets -set -filter {jtag_cable_name =~ "Digilent JTAG-HS3 1312312131233" && level==0} -index 0
fpga -file /home/xxx/xxx/xxx.sdk/mb_subsystem_wrapper_hw_platform_0/mb_subsystem_wrapper.bit
configparams mdm-detect-bscan-mask 2
targets -set -nocase -filter {name =~ "microblaze*#0" && bscan=="USER2"  && jtag_cable_name =~ "Digilent JTAG-HS3 1312312131233"} -index 0
rst -processor
targets -set -nocase -filter {name =~ "microblaze*#0" && bscan=="USER2"  && jtag_cable_name =~ "Digilent JTAG-HS3 1312312131233"} -index 0
dow /home/xxx/xxx/xxx.sdk/HelloWorld/Debug/HelloWorld.elf
----------------End of Script----------------

20:35:47 INFO	: Context for processor 'microblaze_0' is selected.
20:35:47 INFO	: 'con' command is executed.
20:35:47 INFO	: ----------------XSDB Script (After Launch)----------------
targets -set -nocase -filter {name =~ "microblaze*#0" && bscan=="USER2"  && jtag_cable_name =~ "Digilent JTAG-HS3 1312312131233"} -index 0
con
----------------End of Script----------------

20:35:47 INFO	: Disconnected from the channel tcfchan#3.
20:35:59 INFO	: Connected to target on host '127.0.0.1' and port '3121'.

However, none of the expected "Hello World" text is displayed in either the Xilinx SDK's SDK Terminal, nor in Putty, I've also tried to connect using the 'screen' command to no avail:

$ screen /dev/ttyUSB0 9600

What am I doing wrong, and how can I see my output text from the Hello World example?

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mrh973
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2,039 Views
Registered: ‎02-06-2019

I've figured it out. The HelloWorld ELF file must be included on the Debug Configuration's Application tab in the Xilinx SDK, once I added it I got my "Hello World" output in Putty.

Screenshot from 2019-02-13 00-11-53.png

View solution in original post

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mrh973
Visitor
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2,040 Views
Registered: ‎02-06-2019

I've figured it out. The HelloWorld ELF file must be included on the Debug Configuration's Application tab in the Xilinx SDK, once I added it I got my "Hello World" output in Putty.

Screenshot from 2019-02-13 00-11-53.png

View solution in original post

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