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Visitor
Visitor
6,067 Views
Registered: ‎11-08-2007

Not able to clock PPC405 @ 300Mhz

Hi all,
 
I've been try to clock PPC405 (fx12 sx363 -10) at 300Mhz.
reference CLK 100Mhz , bus 100Mhz, and PPC core 300Mhz.
everything clocked at 100Mhz worked fine. but when I use CLKFX to give 300mhz to ppc, it didn't work.
I tried 300Mhz as reference and used CLKDV( 3) for buses (OPB , PLB). Still no luck.
I tried DFS and DLL settting to high and low then all possible permutation still no luck. 
 
Do you know how I can clock PPC to 300mhz?
(btw I have a Nuhorizon fx12 -10 board. and the I am using their test module project as my base edk project. )
 
Thanks in advance.
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Visitor
Visitor
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Registered: ‎09-11-2007

PPC cant run at 300MHZ maybe the constraint to its clock isnt correct set.
 
pay attention to the following constrain on DDR : PARAMETER C_DFS_FREQUENCY_MODE = HIGH
Have you set this constraint in your design?
 
Following is the high speed constraint segment in my system, hope can help you solve out the problem:
 
 
PPC:
BEGIN ppc405_virtex4
 PARAMETER INSTANCE = ppc405_0
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_IDCR_BASEADDR = 0b0100000000
 PARAMETER C_IDCR_HIGHADDR = 0b0100001111
 BUS_INTERFACE JTAGPPC = jtagppc_0_0
 BUS_INTERFACE IPLB = plb
 BUS_INTERFACE DPLB = plb
 PORT PLBCLK = sys_clk_s
 PORT C405RSTCHIPRESETREQ = C405RSTCHIPRESETREQ
 PORT C405RSTCORERESETREQ = C405RSTCORERESETREQ
 PORT C405RSTSYSRESETREQ = C405RSTSYSRESETREQ
 PORT RSTC405RESETCHIP = RSTC405RESETCHIP
 PORT RSTC405RESETCORE = RSTC405RESETCORE
 PORT RSTC405RESETSYS = RSTC405RESETSYS
 PORT CPMC405CLOCK = proc_clk_s
 PORT CPMDCRCLK = sys_clk_s
END
 
DDR:
BEGIN dcm_module
 PARAMETER INSTANCE = dcm_0
 PARAMETER HW_VER = 1.00.c
 PARAMETER C_CLK0_BUF = TRUE
 PARAMETER C_CLKIN_PERIOD = 10.000000
 PARAMETER C_CLK_FEEDBACK = 1X
# never reset
 PARAMETER C_EXT_RESET_HIGH = 1
# PARAMETER C_DLL_FREQUENCY_MODE = LOW
 PARAMETER C_CLKFX_BUF = TRUE
 PARAMETER C_CLKFX_DIVIDE = 1
 PARAMETER C_CLKFX_MULTIPLY = 3
 PARAMETER C_DFS_FREQUENCY_MODE = HIGH
 PARAMETER C_CLK90_BUF = TRUE
# PARAMETER C_CLK180_BUF = TRUE
# PARAMETER C_CLK270_BUF = TRUE
 PARAMETER C_CLKDV_BUF = TRUE
# PORT CLK180 = plb_ddr_0_PLB_Clk_n
# PORT CLK270 = plb_ddr_0_Clk90_in_n
 PORT CLK90 = clk_90_s
 PORT CLKFX = proc_clk_s
 PORT CLKDV = dcm_0_Tft_clk
 PORT CLKFB = sys_clk_s
 PORT CLKIN = dcm_clk_s
 PORT LOCKED = dcm_0_lock
 PORT CLK0 = sys_clk_s
 PORT RST = net_gnd
END
BEGIN dcm_module
 PARAMETER INSTANCE = dcm_1
 PARAMETER HW_VER = 1.00.c
 PARAMETER C_CLKIN_PERIOD = 10.000000
 PARAMETER C_EXT_RESET_HIGH = 0
 PARAMETER C_CLK0_BUF = TRUE
 PARAMETER C_CLK_FEEDBACK = 1X
 PARAMETER C_CLK90_BUF = TRUE
 PARAMETER C_DLL_FREQUENCY_MODE = LOW
# PARAMETER C_CLK270_BUF = TRUE
 PARAMETER C_CLKOUT_PHASE_SHIFT = FIXED
 PARAMETER C_PHASE_SHIFT = 39
 PORT RST = dcm_0_lock
 PORT CLKIN = ddr_feedback_s
 PORT CLKFB = dcm_1_FB
 PORT CLK0 = dcm_1_FB
 PORT CLK90 = ddr_clk_90_s
# PORT CLK270 = plb_ddr_0_DDR_Clk90_in_n
 PORT LOCKED = dcm_1_lock
END
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