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860 Views
Registered: ‎09-08-2016

Number of cycles required to transfer data between 32-bit microblaze and custom IP in artix7

I have created a custom IP using Xilinx Vivado with Artix-7 FPGA. The AXI bus is used in between the 32-bit Microblaze and custom IP. I need to send the inputs to the custom IP from the Microblaze via 32-bit AXI bus. Similarly, the data output from the custom IP needs to be transferred to the Microblaze via 32-bit AXI bus. What would be the number of cycles required to transfer data between 32-bit microblaze and custom IP in artix7 fpga?

 

 

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smarell
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Community Manager
845 Views
Registered: ‎07-23-2012

If it a 32-bit to 32-bit, it requires just one cycle.
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Registered: ‎09-08-2016

Thanks for your reply. Is there any reference document for this?

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smarell
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Community Manager
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Registered: ‎07-23-2012

We don't have a reference document for this but you can validate in simulation with a simple test case.
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