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Participant bwolfe
Participant
3,066 Views
Registered: ‎08-23-2012

PlanAhead and CoreGenerator usage

I'm interested in generating a new core for a project created under PlanAhead (PA) 14.3. The process for creating a core is fairly straight forward under PA, i.e.,

 

- open the IP Catalog under the Project Manager panel

- find the specific IP to instantiate and double click on it

- customize the IP in the pop-up window and click on the Generate button

 

This process adds a new entry to the Design Sources list.

 

To add this IP source to my design, I expected to just open XPS (by double clicking on the system_i entry under Design Sources) and see that customized IP in the IP catalog, but it's not there. Obviously I'm missing some step, but can't find any documentation that illustrates this process clearly. If someone could explain the missing step, I'd appreciate it.

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3 Replies
Participant bwolfe
Participant
3,047 Views
Registered: ‎08-23-2012

Re: PlanAhead and CoreGenerator usage

Why hasn't anybody replied to this post? Is my question not worded properly? If someone could just point me in the right direction here...
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Xilinx Employee
Xilinx Employee
3,041 Views
Registered: ‎11-28-2007

Re: PlanAhead and CoreGenerator usage

CoreGen IPs can't be directly used in XPS. You will need to import them as pcores in XPS before you can use them in XPS.

 


@bwolfe wrote:

I'm interested in generating a new core for a project created under PlanAhead (PA) 14.3. The process for creating a core is fairly straight forward under PA, i.e.,

 

- open the IP Catalog under the Project Manager panel

- find the specific IP to instantiate and double click on it

- customize the IP in the pop-up window and click on the Generate button

 

This process adds a new entry to the Design Sources list.

 

To add this IP source to my design, I expected to just open XPS (by double clicking on the system_i entry under Design Sources) and see that customized IP in the IP catalog, but it's not there. Obviously I'm missing some step, but can't find any documentation that illustrates this process clearly. If someone could explain the missing step, I'd appreciate it.




Cheers,
Jim
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Participant bwolfe
Participant
3,035 Views
Registered: ‎08-23-2012

Re: PlanAhead and CoreGenerator usage

Thanks for your reply. So I guess the break here is the process of going from what the PlanAhead coregen process produces to the pcore IP entity that I can pull into an XPS project. I've read through the PlanAhead tutorial

 

http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_3/PlanAhead_Tutorial_RTL_Design_IP.pdf

 

and on page 36 it describes how to instantiate an adder. Step 9 of the process says

 

"Select the text in the Text Editor, as shown above, and click the Copy Text button.
The copied text can easily be pasted into any RTL source file to instantiate the IP. Once done, the IP can easily be generated through synthesis by selecting the Generate IP popup command."

 

This step is clearly written for somebody who is already familiar with the Xilinx tools, so the context of step 9 is lost on me. For example, where does the new source file with the copied instatiation code go? Does it go in the same directory as the other files generated by the core generator? Do I add the source to the PlanAhead sources? Does the "Generate IP popup command" show up under PlanAhead or XPS? If there was another tutorial that actually illustrated step 9, that would go a long way.

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