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Newbie neelay93
Registered: ‎07-04-2016

Problems associating Microblaze ELF file with bitstream on Virtex 7


We are having some trouble getting Microblaze code to run automatically (after programming the FPGA).  We are using the Xilinx SDK to compile Microblaze C code into a .elf file, which we then associate with the bitstream using the following procedure (in Vivado):

- Right click the microblaze in the block design, click "associate ELF file"

- Under design sources, change the associated elf file to our compiled C code.

- Regenerate bitstream

Our C code doesn't boot up automatically after programming the FPGA with the new bitstream, as we would expect.  However, if we 1) leave the FPGA on, 2) load the ELF file using the SDK, our code will boot up automatically on subsequent reprogramming of the FPGA (with the new bitstream).  Thoughts?


We are using a custom board that is similar to the VC707 evaluation board.  Thanks!

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Scholar stephenm
Registered: ‎05-06-2012

Re: Problems associating Microblaze ELF file with bitstream on Virtex 7

After you program the fpga with the bitstream, can you check the contents of the BRAM using XSDB?


XSDB%targets X

where x is the processor

XSDB%mrd 0x00000000 0x10


what do you see here?, you can open the ELF in SDK to see if the contents match (or the first 16 words)

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