UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor arsenix
Visitor
9,911 Views
Registered: ‎07-17-2008

Put Coregen component into EDK library?

  I am having trouble with a Coregenerator core that I am trying to place into an EDK library.

 

  I have created a pcore to act solely as a library of components which are instantiated in other places.  I modeled this after Xilinx cores like "common_v1_00_a" , which do not have a main vhdl file.  This worked fine but the complication is that several of the components in my library pcore instantiate a coregenerator multiplier which I previously generated and tested through ISE.  I receive the dreaded "could not be resolved" error message on these components.  I have put the NGC file into the netlist directory, added a .bbd file and added "STYLE=MIX" and "RUN_NGCBUILD=TRUE" as options in my mpd file.  It does not appear to be even looking at the bbd file though.  Is it not possible to add NGC netlists to pcores structured this way?  It would require reworking my project quite a bit to move all these library components around.

 

  Any tips would be appreciated.

 

 

James

 

0 Kudos
7 Replies
Observer asi_ka
Observer
9,898 Views
Registered: ‎03-14-2008

Re: Put Coregen component into EDK library?

It's funny, I had the same problem. Could you let me know if you got it solved? Thanks,

 

Kaveh 

0 Kudos
Xilinx Employee
Xilinx Employee
9,886 Views
Registered: ‎08-13-2007

Re: Put Coregen component into EDK library?

Have you seen this?

http://www.xilinx.com/support/answers/22882.htm (9.1i EDK -  What should I do to instantiate a netlist core in my custom peripheral?)

I haven't personally tried it, but there seem to be a few details which could cause issues if you aren't careful.

 

bt

0 Kudos
Observer asi_ka
Observer
9,871 Views
Registered: ‎03-14-2008

Re: Put Coregen component into EDK library?

Thanks for the link. Actually, I've done all those configs and EDK still doesn't copy the ".ngc" files to the "implementation" folder. If I do it by hand, then everything is fine though!

 

Kaveh

0 Kudos
Visitor arsenix
Visitor
9,863 Views
Registered: ‎07-17-2008

Re: Put Coregen component into EDK library?

  I also tried all those rec's before posting here.  Kaveh so when you copied the ngc file into the implementation folder it managed to find it and everything worked?  I had not tried this yet but had considered it.  Whatever will get my project to build at this point is fine by me...

 

James

 

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
9,853 Views
Registered: ‎08-13-2007

Re: Put Coregen component into EDK library?

James/Kaveh,

 

It sounds like everything is synthesizing correctly but it may not be able to locate the netlist for translate/ngdbuild.

I would consider modifying the fast_runtime.opt file in XPS to add the search directory option (e.g. -sd <dirname>) to ngdbuild.

 

You could add to the dirname part the relative path necessary to get from your implementation directory to the core directory with the netlist.

 

This should avoid you having to manually copy the netlist anytime a change is made.

I haven't personally tried it yet, but that is what I would do.

 

More information on the -sd switch is available in the ISE Development Systems Reference Guide (dev.pdf).

 

bt

Observer asi_ka
Observer
9,840 Views
Registered: ‎03-14-2008

Re: Put Coregen component into EDK library?

Thanks for the info. Actually, you were right, I just put the directory in search path and it worked :) 

 

Thanks

Kaveh 

0 Kudos
Visitor ggraf
Visitor
7,878 Views
Registered: ‎03-13-2009

Re: Put Coregen component into EDK library?

Though this is an old thread the problem seems to be back with XPS 11.3, at least in the Linux version which we use.

 

A XPS project which worked fine with in 10.1 now failes with the following error:

 

ERROR:NgdBuild:604 - logical block
   'xps_usb_fx2_0/xps_usb_fx2_0/USER_LOGIC_I/usb_if/usbw_inst' with type
   'writefifo' could not be resolved. A pin name misspelling can cause this, a
   missing edif or ngc file, or the misspelling of a type name. Symbol [..]

 

(Core gen FIFOs are used indirectly in user_logic.vhd.)

 

A "-sd <path to pcore "netlist" folder>;" option for ngdbuild in etc/fast_runtime.opt solved the problem.

 

Günter

 

0 Kudos