Reg: Speeding up ISE 10.1 compilation time ... switching to ISE 12.1...
I am currently running ISE 10.1 on windows XP, Intel core2 Duo, with a clock speed of 2.33GHz and 3.23GB of ram.
I usually compile designs (make bitfiles) for a Virtex5 FPGA. The time to make the bitfile is about 45 mins.
I was wondering if I kept the same OS and hardware, and switched to ISE 12.1, will it have any effect on the compilation time? Will it help reduce the bitfile generation time? Or should I upgrade my computer hardware as well to work better with 12.1?
Or should I simply upgrade the computer, while keeping ISE 10.1? Will that help reduce the compilation times?
Also, I dont have planahead with ISE 10.1. Will manually floorplanning the FPGA design help reduce the bitfile generation time?