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floda21
Visitor
Visitor
530 Views
Registered: ‎07-27-2017

SDK Processor Zynq

Hello,

Want to program my ZYBO Z7-020 but everything goes fine until I want to program by the SDK. I can make the app, but when I try to program the zynq, only the FPGA part does. Can anyone help me?

 

For the mem test, I got the following from the SDK log:

 

 

23:30:09 INFO : Connected to target on host '127.0.0.1' and port '3121'.
23:30:09 INFO : Jtag cable 'Digilent Zybo Z7 210351AD6A38A' is selected.
23:30:09 INFO : 'jtag frequency' command is executed.
23:30:09 INFO : Sourcing of 'C:/Users/Daniel/Documents/Proyectos_Vivado/vivadoexample29/sdkmem/design_1_wrapper_hw_platform_0/ps7_init.tcl' is done.
23:30:10 INFO : Context for 'APU' is selected.
23:30:10 INFO : System reset is completed.
23:30:13 INFO : 'after 3000' command is executed.
23:30:13 INFO : Context for 'APU' is selected.
23:30:13 INFO : Hardware design information is loaded from 'C:/Users/Daniel/Documents/Proyectos_Vivado/vivadoexample29/sdkmem/design_1_wrapper_hw_platform_0/system.hdf'.
23:30:13 INFO : 'configparams force-mem-access 1' command is executed.
23:30:13 INFO : Context for 'APU' is selected.
23:30:13 INFO : 'ps7_init' command is executed.
23:30:13 INFO : 'ps7_post_config' command is executed.
23:30:13 INFO : Context for processor 'ps7_cortexa9_0' is selected.
23:30:14 INFO : The application 'C:/Users/Daniel/Documents/Proyectos_Vivado/vivadoexample29/sdkmem/mem1/Debug/mem1.elf' is downloaded to processor 'ps7_cortexa9_0'.
23:30:14 INFO : 'configparams force-mem-access 0' command is executed.
23:30:14 INFO : ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
source C:/Users/Daniel/Documents/Proyectos_Vivado/vivadoexample29/sdkmem/design_1_wrapper_hw_platform_0/ps7_init.tcl
targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent Zybo Z7 210351AD6A38A"} -index 0
rst -system
after 3000
targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent Zybo Z7 210351AD6A38A"} -index 0
loadhw -hw C:/Users/Daniel/Documents/Proyectos_Vivado/vivadoexample29/sdkmem/design_1_wrapper_hw_platform_0/system.hdf -mem-ranges [list {0x40000000 0xbfffffff}]
configparams force-mem-access 1
targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent Zybo Z7 210351AD6A38A"} -index 0
ps7_init
ps7_post_config
targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Digilent Zybo Z7 210351AD6A38A"} -index 0
dow C:/Users/Daniel/Documents/Proyectos_Vivado/vivadoexample29/sdkmem/mem1/Debug/mem1.elf
configparams force-mem-access 0
----------------End of Script----------------

23:30:14 INFO : Context for processor 'ps7_cortexa9_0' is selected.
23:30:14 INFO : 'con' command is executed.
23:30:14 INFO : ----------------XSDB Script (After Launch)----------------
targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Digilent Zybo Z7 210351AD6A38A"} -index 0
con
----------------End of Script----------------

23:30:14 INFO : Disconnected from the channel tcfchan#3.

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3 Replies
andresb
Xilinx Employee
Xilinx Employee
468 Views
Registered: ‎06-21-2018

Hi Daniel,

Can you try following this Tutorial and reporting the results?:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-getting-started-with-zynq/start

Thanks,
Andres

 

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floda21
Visitor
Visitor
447 Views
Registered: ‎07-27-2017

Hi Andres,

Yes, already did that, didnt work. Now Im trying with Vitis and the same problem, but now I think its something adout the booting:

 

xsct% Info: ARM Cortex-A9 MPCore #0 (target 2) Running
xsct%
initializing
0% 0MB 0.0MB/s ??:?? ETA
28% 1MB 2.2MB/s ??:?? ETA
48% 1MB 1.8MB/s ??:?? ETA
70% 2MB 1.8MB/s ??:?? ETA
92% 3MB 1.7MB/s ??:?? ETA
100% 3MB 1.7MB/s 00:02

Downloading Program -- C:/Users/Daniel/Documents/Proyectos_Vitis/proyecto01/holaa/Debug/holaa.elf
section, .text: 0x00100000 - 0x00100a03
section, .init: 0x00100a04 - 0x00100a0f
section, .fini: 0x00100a10 - 0x00100a1b
section, .rodata: 0x00100a1c - 0x00100a2f
section, .data: 0x00100a30 - 0x00100e9f
section, .eh_frame: 0x00100ea0 - 0x00100ea3
section, .mmu_tbl: 0x00104000 - 0x00107fff
section, .init_array: 0x00108000 - 0x00108003
section, .fini_array: 0x00108004 - 0x00108007
section, .bss: 0x00108008 - 0x0010802f
section, .heap: 0x00108030 - 0x0010a02f
section, .stack: 0x0010a030 - 0x0010d82f

0% 0MB 0.0MB/s ??:?? ETA
100% 0MB 0.4MB/s 00:00

Setting PC to Program Start Address 0x00100000
Successfully downloaded C:/Users/Daniel/Documents/Proyectos_Vitis/proyecto01/holaa/Debug/holaa.elf
Info: ARM Cortex-A9 MPCore #0 (target 2) Stopped at 0xffffff28 (Suspended)
_vector_table() at asm_vectors.S: 71
71: B _boot
xsct% Info: ARM Cortex-A9 MPCore #0 (target 2) Running
Info: ARM Cortex-A9 MPCore #0 (target 2) Stopped at 0x100000 (Suspended)
71: B _boot

 

Still, have no solution until now.

 

Just for the record: Have no problem with the FPGA part with Vivado.

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stephenm
Moderator
Moderator
361 Views
Registered: ‎09-12-2007

I tested this on my end on a zc702 board. I used the script attached here to generate the workspace in Vitis. I also have a proc to run on the hardware. This will download the images via jtag in XSCT

I used a makefile to call the procs and pass the params

You can use these as reference. Just change the XSCT path to match your own, and the XSA name to match yours too

Then just do:

  • make build
  • make run

xsct.PNG

 

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