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Newbie
Newbie
8,091 Views
Registered: ‎10-20-2009

SDK external ports problem

Hello All,

 

I have been using an ML-505 board with a Virtex-5 FPGA chip for over a year now. However, until now

I was only interested in HDL design (mostly Verilog) and ISE has been sufficient. Recently, I needed

to include an embedded processor for my design and I realized there is a bigger world beyond hdl design :)

 

I have already managed to create a microblaze processor using XPS and exported the design to SDK. I followed

some tutorials to create a project and etc. but I couldn't find how I could access to the external ports that

I have defined in XPS. I'm pretty sure that they're defined because in ISE when I "view HDL instantiation" I see

this;

 

"marvin bighead (
    .fpga_0_clk_1_sys_clk_pin(fpga_0_clk_1_sys_clk_pin),
    .fpga_0_rst_1_sys_rst_pin(fpga_0_rst_1_sys_rst_pin),
    .ExternalPort_0(ExternalPort_0),
    .ExternalPort_1(ExternalPort_1)
    );

"

I think this proves that ports are well defined. However, in the libraries (.h) that are within my SDK project,

I can't find anything corresponding to these ports. I followed some tutorials, but I couldn't find any solution.

I would appreciate all help.

 

Thanks in advance.

 

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12 Replies
Adventurer
Adventurer
7,853 Views
Registered: ‎11-17-2009

Hi,

 

I also have the same problem, can any body help on this issue

 

 

Best Regards,

uzair

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Anonymous
Not applicable
7,842 Views

Hi,

 

This problem might be similar to a problem I reported in the following posts:

 

1st time experience of SDK (http://forums.xilinx.com/xlnx/board/message?board.id=EDK&thread.id=11825)

 

Bunch of EDK/SDK/Xilkernel Bugs (http://forums.xilinx.com/xlnx/board/message?board.id=EDK&thread.id=12692)

 

It looks like the problem will be fixed in 12.0.

 

Regards,

Bob

 

Participant
Participant
7,840 Views
Registered: ‎10-29-2008

If I understand your question correctly, you are trying to access ports in an existing HDL design you have in ISE from within a Microblaze that you just added to the ISE project.  Note that there are at least two flows for using a processor in Xilinx tools: 1) you can import the processor into ISE, or 2) you can import the HDL into EDK.  I prefer the latter, but since you are new to processors #1 might be best (and sounds like what you're doing).

 

Either way, the approach is similar.  You should add a GPIO device to your processor in EDK before exporting it.  To do this, go into EDK, click the IP Catalog tab and search under "General Purpose IO" for XPS General Purpose IO.  Then add this IP to your processor project. You will need to specify how many lines you want in the GPIO and you will need to ensure that these go outside of your EDK project (you will need PORT statements at the top of your MHS file).  I can describe this in more detail if you don't get this answer.

 

Once you have done this, rebuild your processor and bring it into ISE.  These ports will now be visible as you have named them in EDK and you can connect them to your HDL in ISE.

 

Steve 

Adventurer
Adventurer
7,809 Views
Registered: ‎11-17-2009

Hi ,

 

 I think that you have misunderstood..., Actually i have created some ports in Xps , now i want to access these ports in SDK (software portion) to process the comming data

 

Any  help in this regard?

 

Thanks and Best Regards,

Uzair

 

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Xilinx Employee
Xilinx Employee
7,802 Views
Registered: ‎01-18-2008

Steve is correct. You cannot access pins (global ports in your MHS) directly from SDK. Think about it - a processor can access memory locations, but what memory should be assigned to the pins? In order to bypass that, what you do is connect pins that you want to access to a gpio device. Then you access the pins by reading/writing to the gpio registers.
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Participant
Participant
7,800 Views
Registered: ‎10-29-2008

This is what I thought you were trying to do.  To access these ports in the processor, you will need a mechanism to read them.  If they are I2C or SPI, you instantiate an I2C or SPI device in EDK.  In your case, these are just logic lines you need to read and write so the right thing to do is instantiate a GPIO device as I suggested.
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Adventurer
Adventurer
7,792 Views
Registered: ‎11-17-2009

Hi,

thanks steve and vsiva for your great help.

 

I need some further elaboration, i have already created an ip with some external ports (ports that i want to access in software programming ),should i make aother one for gpio or gpio would be somehow mounted in the existing ip? and if gpio is on  different ip then how to map it with other ip's ports? Also would this procedure be same for bidirectional (inout) ports?

 

 

Thanks and Best Regards,

Uzair

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Participant
Participant
7,790 Views
Registered: ‎10-29-2008

In general, your HDL just needs external ports and needs no other modification. 

 

Then in the uP definition over in EDK, you need to add the GPIO IP as I discussed .  When you bring the uP definition back over into ISE, these external ports will be in the definition and they just need to be mapped in HDL to your ports to tie them together as you would any HDL.  The uP just looks like another piece of HDL with ports and you include this in your top level by instantiating it in the HDL and mapping to ports to your HDL...  make sense?

 

Steve 

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Adventurer
Adventurer
7,751 Views
Registered: ‎11-17-2009

Hi,

I have seen all the available EDK Documentation namely 

 But none of them contains any info about gpio, The only source of information about gpio is the datasheet of gpio, which is obtained from IP catalog tab in XPS. 

But I cannot find "how to use gpio", I have seen the mhs and mss files they contain some gpio declarations, Can anybody guide me about how to use gpio or tell me any reference that contains this.

 

Thanks and Best Regards,

Uzair

 

 

 

 

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Contributor
Contributor
3,175 Views
Registered: ‎08-04-2009

Hi

 

 

For GPIO usage you can refer to 

 

http://www.eecg.toronto.edu/~pc/courses/edk/node4.html#SECTION00047000000000000000

 

m02 .pdf and mo2.zip 

 

 

Hope this helps 

 

Archana

Regards
Archu
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Participant
Participant
3,161 Views
Registered: ‎10-29-2008

I would recommend taking one of the Avnet/Xilinx one-day EDK classes (On Ramp) that are offered from time to time if you are a qualified Avnet account.  Search avnet's website for OnRamp sessions for Xilinx and look for EDK.

 

Briefly, the steps to using GPIO or any of the Xilinx IP are as follows:

1. You need to be in the XPS tool with your project open.

2. On the left most panel, you will see an area called the "Project Information Area."  There should be three tabs under this: "Project," "Applications," and "IP Catalog."  All of the pre-included Xilinx IP such as Microblaze, GPIO, SPI, I2C, etc. are in the IP Catalog Tab.  Click the "IP Catalog" Tab

3. If not expanded, click on the "EDK Install" plus (+) sign to expand this list. You should see a list of IP components that you can add to your design.  You have likely already added a processor (PPC or Microblaze depending on your part).  These are on the "Processor" line.  You are looking for GPIO and it is on the "General Purpose IO" line.  Click the plus (+) to the left of this line.

4. a line with a green star should appear that says "XPS General Purpose IO."   You should right-click this line and select "Add IP"

5. The panel to the right has tabs on the bottom and the top.  Select "System Assembly View" on the bottom tab.  This allows you to review your hardware configuration (in the FPGA)

6. On the top, select "Bus Interfaces"

7. You should see a new line called "xps_gpio" or something similar.  Click the plus (+) next to it to expand its ports

8. Be sure that your PLB bus is selected in the drop-down box to the right of SPLB -- this will connect your GPIO device to the PLB in the FPGA and allow your processor to talk to it

9. Right-click the xps_gpio line and select "Configure IP"

10.  A panel will appear and you will need to select how many IO lines you need.  This is fairly self explanatory.  Note that you will have to connect each of these IO lines to an internal port (from some other HDL) or to a pin on the part.  If you need more than 16 lines, enable channel #2.  If you need more than 32 lines, add a second GPIO device as you did in step #5

11. Close the configure IP dialog

12. Click "Addresses" tab 

13. On the far right, you will see a button labeled "Generate Addresses" -- this will generate an address in memory of your processor for the GPIO device.  Click this button

14. You may now re-synthesize your XPS project into hardware

 

To actually use the device, you will need to go to the SDK and Synchronize with Hardware (this will add the driver to your software project).  Then you can use the API reference and examples you find on the web to call it in software.

 

I've tried to make this as simple as I can, and once you are familiar with EDK (XPS + SDK) this is a real cake-walk.  But when you first use the tools, you are going to feel like it's the most complicated thing on the planet.  This is why I would recommend going to an on-ramp if you can.  I went through all this last year -- from knowing nothing to being an EDK afficianado and it's a rough road. I will say, however, that the tools are very powerful and really automate the construction of an embedded system once you learn them.

 

Good luck.

 

Steve 

Adventurer
Adventurer
3,148 Views
Registered: ‎11-17-2009

Hi steve and Archu ,

 

thanks alot for your help, its solves my problem, i will go now for On Ramp classes

 

Thanks and Best Regards,

Uzair

Message Edited by mm_uzair on 03-04-2010 05:03 AM
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