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Contributor
Contributor
167 Views
Registered: ‎11-10-2019

Simulate PL+PS bare metal in SDK without board

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I have found many similar questions and still can not understand if this is possible, and if it is, how to do it.

I have a complex PL design but all the inputs/outputs are connected to the PS, so there's a lot I can see on the timing diagrams when simulating in Vivado. This would be a night mare to evaluate proper functionality of the design.

Instead, I would like to run/debug the simulation in SDK and see the debug messages that would be much more "interpretable" than timing diagrams - this would be a good indicator of how the system functions. Since I have no board at the time, I was hoping that there would be a way to peform debug simulation in SDK as if it was connected to a board. I know it would not be the exact representation of hardware, but should provide a good idea of the general flow and functionality of the design.

Please, tell me what would be the closest solution to this problem: PL + PS + bare metal + no board.

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Moderator
Moderator
98 Views
Registered: ‎10-06-2016

Re: Simulate PL+PS bare metal in SDK without board

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Hi @naz_rb 

Although your use case is technically possible is quite complex and definitively out of Xilinx support. The PS emulation side can be done using QEMU, and actually there is a Xilinx QEMU user guide to provide guideline on how to use it to emulate the Zynq or ZynqMP PS.

In this document you can also find a chapter dedicated to Co-Simulation, which is your use case. As noted in the document usually the hardware side emulation is done using a SystemC simulator (not the integrated Vivado simulator) so unless you are experienced with those tools I think it might be quite hard to do.

Regards


Ibai
Don’t forget to reply, kudo, and accept as solution.

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2 Replies
Moderator
Moderator
99 Views
Registered: ‎10-06-2016

Re: Simulate PL+PS bare metal in SDK without board

Jump to solution

Hi @naz_rb 

Although your use case is technically possible is quite complex and definitively out of Xilinx support. The PS emulation side can be done using QEMU, and actually there is a Xilinx QEMU user guide to provide guideline on how to use it to emulate the Zynq or ZynqMP PS.

In this document you can also find a chapter dedicated to Co-Simulation, which is your use case. As noted in the document usually the hardware side emulation is done using a SystemC simulator (not the integrated Vivado simulator) so unless you are experienced with those tools I think it might be quite hard to do.

Regards


Ibai
Don’t forget to reply, kudo, and accept as solution.

View solution in original post

Contributor
Contributor
48 Views
Registered: ‎11-10-2019

Re: Simulate PL+PS bare metal in SDK without board

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@ibaie  Not exactly what I was hoping for, but the answer accepted. I think many people would appreciate if Xilinx provided an integrated emulator for simulating PL+PS in a more straight forrward way.

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