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Visitor 16189600
Visitor
1,815 Views
Registered: ‎08-06-2009

Simulating TFT core in EDK

HI,I'm trying to use the TFT IP core provided by Xilinx and am unable to
simulate the entire system using ModelSim 6.1b. I've compiled the EDK
and ISE libraries correctly, and I'm simply trying to find a way to let
my verilog files know where to find the necessary files. When
compiling the TFT piece, I receive the following error messages:

 

 

 

# ** Error: (vsim-3033) F:/jin/project_engage/XUPV2/ram_vga/pcores/plb_tft_cntlr_ref_v1_00_d/hdl/verilog/plb_tft_cntlr_ref.v(501): Instantiation of 'BUFG' failed. The design unit was not found.
#         Region: /system/vga_framebuffer/vga_framebuffer/BUFG_pixclk
#         Searched libraries:
#             plb_tft_cntlr_ref_v1_00_d
# ** Error: (vsim-3033) F:/jin/project_engage/XUPV2/ram_vga/pcores/plb_tft_cntlr_ref_v1_00_d/hdl/verilog/plb_tft_cntlr_ref.v(526): Instantiation of 'DCM' failed. The design unit was not found.
#         Region: /system/vga_framebuffer/vga_framebuffer/DCM_pixclk
#         Searched libraries:
#             plb_tft_cntlr_ref_v1_00_d

 

Can anyone help me?

 

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