I have a problem with the Quad SPI core (v 5.1) of Vivado on the Zynq/Zedboard. I have succesfully setup a working QSPI core, data can be transmitted. However at the end of each transmission the chip/slave select pin is toggled for a very short period of time.
my spi transmission procedure:
1. configure SPI core (default, SPI system enabled)
2. write data to DTR (data transmission) register (here 0x0F)
3. clear SPISSR
4. clear master transaction inhibit bit
Then data is transmitted. The resulting waveforms can be seen in the attachment.